[U-Boot] [RFC PATCH v1 0/2] Make most DDR non-secure in MMU while keep a small block secure

[York Sun]

This set is to change MMU tables so DDR is in non-secure mode that
non-secure master such as SDHC DMA can access the data. To mix
secure and non-secure MMU entries, the MMU tables themselves have
to be in secure memory. A small portion memory is reserved at the
end of DDR (before debug server and MC) to host secure application
and the MMU tables.

Changes in v1:
  Initial patch.
  Depends on http://patchwork.ozlabs.org/patch/540248/

York Sun (2):
  armv8: fsl-layerscape: Reserve memory for PPA
  armv8: fsl-layerscape: Make DDR non secure in MMU tables

 README                                            |   14 +-
 arch/arm/cpu/armv8/fsl-layerscape/cpu.c           |  149 +++++++++++++++++++--
 arch/arm/include/asm/arch-fsl-layerscape/config.h |    3 +
 arch/arm/include/asm/arch-fsl-layerscape/cpu.h    |   12 +-
 arch/arm/include/asm/global_data.h                |    3 +
 board/freescale/ls2085a/ddr.c                     |   10 ++
 board/freescale/ls2085a/ls2085a.c                 |   17 ---
 board/freescale/ls2085aqds/ddr.c                  |   10 ++
 board/freescale/ls2085aqds/ls2085aqds.c           |   17 ---
 board/freescale/ls2085ardb/ddr.c                  |   10 ++
 board/freescale/ls2085ardb/ls2085ardb.c           |   17 ---
 common/cmd_bdinfo.c                               |    4 +
 include/configs/ls2085a_common.h                  |    4 +-
 13 files changed, 201 insertions(+), 69 deletions(-)

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1.7.9.5