[U-Boot] [PATCH v2 06/14] ARM: uniphier: rename CONFIG_MACH_* to CONFIG_ARCH_UNIPHIER_*
Masahiro Yamada
yamada.masahiro at socionext.com
Mon Sep 21 17:27:34 CEST 2015
I want these prefixed with CONFIG_ARCH_UNIPHIER_ to clarify
they belong to UniPhier SoC family.
Signed-off-by: Masahiro Yamada <yamada.masahiro at socionext.com>
---
arch/arm/mach-uniphier/Kconfig | 14 +++++++-------
arch/arm/mach-uniphier/Makefile | 8 ++++----
arch/arm/mach-uniphier/include/mach/ddrphy-regs.h | 3 ++-
arch/arm/mach-uniphier/include/mach/sc-regs.h | 2 +-
arch/arm/mach-uniphier/ph1-pro4/pll_init.c | 2 --
configs/ph1_ld4_defconfig | 2 +-
configs/ph1_sld3_defconfig | 2 +-
configs/ph1_sld8_defconfig | 2 +-
drivers/pinctrl/uniphier/Kconfig | 12 ++++++------
include/configs/uniphier.h | 17 +++++++++--------
10 files changed, 32 insertions(+), 32 deletions(-)
diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig
index 28d574f..d7a19c6 100644
--- a/arch/arm/mach-uniphier/Kconfig
+++ b/arch/arm/mach-uniphier/Kconfig
@@ -8,20 +8,20 @@ config UNIPHIER_SMP
choice
prompt "UniPhier SoC select"
- default MACH_PH1_PRO4
+ default ARCH_UNIPHIER_PH1_PRO4
-config MACH_PH1_SLD3
+config ARCH_UNIPHIER_PH1_SLD3
bool "PH1-sLD3"
select UNIPHIER_SMP
-config MACH_PH1_LD4
+config ARCH_UNIPHIER_PH1_LD4
bool "PH1-LD4"
-config MACH_PH1_PRO4
+config ARCH_UNIPHIER_PH1_PRO4
bool "PH1-Pro4"
select UNIPHIER_SMP
-config MACH_PH1_SLD8
+config ARCH_UNIPHIER_PH1_SLD8
bool "PH1-sLD8"
endchoice
@@ -53,11 +53,11 @@ choice
config DDR_FREQ_1600
bool "DDR3 1600"
- depends on MACH_PH1_SLD3 || MACH_PH1_LD4 || MACH_PH1_PRO4
+ depends on ARCH_UNIPHIER_PH1_SLD3 || ARCH_UNIPHIER_PH1_LD4 || ARCH_UNIPHIER_PH1_PRO4
config DDR_FREQ_1333
bool "DDR3 1333"
- depends on MACH_PH1_SLD3 || MACH_PH1_LD4 || MACH_PH1_SLD8
+ depends on ARCH_UNIPHIER_PH1_SLD3 || ARCH_UNIPHIER_PH1_LD4 || ARCH_UNIPHIER_PH1_SLD8
endchoice
diff --git a/arch/arm/mach-uniphier/Makefile b/arch/arm/mach-uniphier/Makefile
index df6a569..d30cc27 100644
--- a/arch/arm/mach-uniphier/Makefile
+++ b/arch/arm/mach-uniphier/Makefile
@@ -31,7 +31,7 @@ obj-y += timer.o
obj-$(CONFIG_MICRO_SUPPORT_CARD) += micro-support-card.o
-obj-$(CONFIG_MACH_PH1_SLD3) += ph1-sld3/
-obj-$(CONFIG_MACH_PH1_LD4) += ph1-ld4/
-obj-$(CONFIG_MACH_PH1_PRO4) += ph1-pro4/
-obj-$(CONFIG_MACH_PH1_SLD8) += ph1-sld8/
+obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += ph1-sld3/
+obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += ph1-ld4/
+obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += ph1-pro4/
+obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += ph1-sld8/
diff --git a/arch/arm/mach-uniphier/include/mach/ddrphy-regs.h b/arch/arm/mach-uniphier/include/mach/ddrphy-regs.h
index fce0c01..01f5c52 100644
--- a/arch/arm/mach-uniphier/include/mach/ddrphy-regs.h
+++ b/arch/arm/mach-uniphier/include/mach/ddrphy-regs.h
@@ -156,7 +156,8 @@ struct ddrphy {
/* SoC-specific parameters */
#define NR_DATX8_PER_DDRPHY 2
-#if defined(CONFIG_MACH_PH1_LD4) || defined(CONFIG_MACH_PH1_SLD8)
+#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) || \
+ defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8)
#define NR_DDRPHY_PER_CH 1
#else
#define NR_DDRPHY_PER_CH 2
diff --git a/arch/arm/mach-uniphier/include/mach/sc-regs.h b/arch/arm/mach-uniphier/include/mach/sc-regs.h
index df50294..9d697b1 100644
--- a/arch/arm/mach-uniphier/include/mach/sc-regs.h
+++ b/arch/arm/mach-uniphier/include/mach/sc-regs.h
@@ -9,7 +9,7 @@
#ifndef ARCH_SC_REGS_H
#define ARCH_SC_REGS_H
-#if defined(CONFIG_MACH_PH1_SLD3)
+#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3)
#define SC_BASE_ADDR 0xf1840000
#else
#define SC_BASE_ADDR 0x61840000
diff --git a/arch/arm/mach-uniphier/ph1-pro4/pll_init.c b/arch/arm/mach-uniphier/ph1-pro4/pll_init.c
index d693368..8ae8ed6 100644
--- a/arch/arm/mach-uniphier/ph1-pro4/pll_init.c
+++ b/arch/arm/mach-uniphier/ph1-pro4/pll_init.c
@@ -54,12 +54,10 @@ static void vpll_init(void)
tmp = readl(SG_PINMON0);
clk_mode_axosel = tmp & SG_PINMON0_CLK_MODE_AXOSEL_MASK;
-#if defined(CONFIG_MACH_PH1_PRO4)
/* 25MHz or 6.25MHz is default for Pro4R, no need to set VPLLA/B */
if (clk_mode_axosel == SG_PINMON0_CLK_MODE_AXOSEL_25000KHZ ||
clk_mode_axosel == SG_PINMON0_CLK_MODE_AXOSEL_6250KHZ)
return;
-#endif
/* Disable write protect of VPLL27ACTRL[2-7]*, VPLL27BCTRL[2-8] */
tmp = readl(SC_VPLL27ACTRL);
diff --git a/configs/ph1_ld4_defconfig b/configs/ph1_ld4_defconfig
index 899a723..e1665c0 100644
--- a/configs/ph1_ld4_defconfig
+++ b/configs/ph1_ld4_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_UNIPHIER=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
-CONFIG_MACH_PH1_LD4=y
+CONFIG_ARCH_UNIPHIER_PH1_LD4=y
CONFIG_MICRO_SUPPORT_CARD=y
CONFIG_SYS_TEXT_BASE=0x84000000
CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-ld4-ref"
diff --git a/configs/ph1_sld3_defconfig b/configs/ph1_sld3_defconfig
index 79ce0e2..4b871d0 100644
--- a/configs/ph1_sld3_defconfig
+++ b/configs/ph1_sld3_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_UNIPHIER=y
-CONFIG_MACH_PH1_SLD3=y
+CONFIG_ARCH_UNIPHIER_PH1_SLD3=y
CONFIG_MICRO_SUPPORT_CARD=y
CONFIG_SYS_TEXT_BASE=0x84000000
CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-sld3-ref"
diff --git a/configs/ph1_sld8_defconfig b/configs/ph1_sld8_defconfig
index 216d49b..00917fb 100644
--- a/configs/ph1_sld8_defconfig
+++ b/configs/ph1_sld8_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_UNIPHIER=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
-CONFIG_MACH_PH1_SLD8=y
+CONFIG_ARCH_UNIPHIER_PH1_SLD8=y
CONFIG_MICRO_SUPPORT_CARD=y
CONFIG_SYS_TEXT_BASE=0x84000000
CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-sld8-ref"
diff --git a/drivers/pinctrl/uniphier/Kconfig b/drivers/pinctrl/uniphier/Kconfig
index 757edce..2ff616e 100644
--- a/drivers/pinctrl/uniphier/Kconfig
+++ b/drivers/pinctrl/uniphier/Kconfig
@@ -5,37 +5,37 @@ config PINCTRL_UNIPHIER_CORE
config PINCTRL_UNIPHIER_PH1_LD4
bool "UniPhier PH1-LD4 SoC pinctrl driver"
- depends on MACH_PH1_LD4
+ depends on ARCH_UNIPHIER_PH1_LD4
default y
select PINCTRL_UNIPHIER_CORE
config PINCTRL_UNIPHIER_PH1_PRO4
bool "UniPhier PH1-Pro4 SoC pinctrl driver"
- depends on MACH_PH1_PRO4
+ depends on ARCH_UNIPHIER_PH1_PRO4
default y
select PINCTRL_UNIPHIER_CORE
config PINCTRL_UNIPHIER_PH1_SLD8
bool "UniPhier PH1-sLD8 SoC pinctrl driver"
- depends on MACH_PH1_SLD8
+ depends on ARCH_UNIPHIER_PH1_SLD8
default y
select PINCTRL_UNIPHIER_CORE
config PINCTRL_UNIPHIER_PH1_PRO5
bool "UniPhier PH1-Pro5 SoC pinctrl driver"
- depends on MACH_PH1_PRO5
+ depends on ARCH_UNIPHIER_PH1_PRO5
default y
select PINCTRL_UNIPHIER_CORE
config PINCTRL_UNIPHIER_PROXSTREAM2
bool "UniPhier ProXstream2 SoC pinctrl driver"
- depends on MACH_PROXSTREAM2
+ depends on ARCH_UNIPHIER_PROXSTREAM2
default y
select PINCTRL_UNIPHIER_CORE
config PINCTRL_UNIPHIER_PH1_LD6B
bool "UniPhier PH1-LD6b SoC pinctrl driver"
- depends on MACH_PH1_LD6B
+ depends on ARCH_UNIPHIER_PH1_LD6B
default y
select PINCTRL_UNIPHIER_CORE
diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h
index 6405961..bd0769e 100644
--- a/include/configs/uniphier.h
+++ b/include/configs/uniphier.h
@@ -9,7 +9,7 @@
#ifndef __CONFIG_UNIPHIER_COMMON_H__
#define __CONFIG_UNIPHIER_COMMON_H__
-#if defined(CONFIG_MACH_PH1_SLD3)
+#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3)
#define CONFIG_DDR_NUM_CH0 2
#define CONFIG_DDR_NUM_CH1 1
#define CONFIG_DDR_NUM_CH2 1
@@ -23,7 +23,7 @@
#define CONFIG_SDRAM2_SIZE 0x10000000
#endif
-#if defined(CONFIG_MACH_PH1_LD4)
+#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4)
#define CONFIG_DDR_NUM_CH0 1
#define CONFIG_DDR_NUM_CH1 1
@@ -34,7 +34,7 @@
#define CONFIG_SDRAM1_SIZE 0x10000000
#endif
-#if defined(CONFIG_MACH_PH1_PRO4)
+#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4)
#define CONFIG_DDR_NUM_CH0 2
#define CONFIG_DDR_NUM_CH1 2
@@ -45,7 +45,7 @@
#define CONFIG_SDRAM1_SIZE 0x20000000
#endif
-#if defined(CONFIG_MACH_PH1_SLD8)
+#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8)
#define CONFIG_DDR_NUM_CH0 1
#define CONFIG_DDR_NUM_CH1 1
@@ -175,7 +175,7 @@
#define CONFIG_NAND_DENALI_ECC_SIZE 1024
-#ifdef CONFIG_MACH_PH1_SLD3
+#ifdef CONFIG_ARCH_UNIPHIER_PH1_SLD3
#define CONFIG_SYS_NAND_REGS_BASE 0xf8100000
#define CONFIG_SYS_NAND_DATA_BASE 0xf8000000
#else
@@ -291,11 +291,12 @@
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define CONFIG_NR_DRAM_BANKS 2
-#if defined(CONFIG_MACH_PH1_SLD3) || defined(CONFIG_MACH_PH1_LD4) || \
- defined(CONFIG_MACH_PH1_SLD8)
+#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) || \
+ defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) || \
+ defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8)
#define CONFIG_SPL_TEXT_BASE 0x00040000
#endif
-#if defined(CONFIG_MACH_PH1_PRO4)
+#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4)
#define CONFIG_SPL_TEXT_BASE 0x00100000
#endif
--
1.9.1
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