[U-Boot] [PATCH v6 4/5] spi: cadence_qspi: rename ahbbase to flashbase for clarity

[Vikas MANOCHA]

Hi Jagan,

> -----Original Message-----
> From: Jagan Teki [mailto:jteki at openedev.com]
> Sent: Wednesday, September 23, 2015 3:15 AM
> To: Vikas MANOCHA
> Cc: u-boot at lists.denx.de; Stefan Roese; Graham Moore; Marek Vašut
> Subject: Re: [U-Boot] [PATCH v6 4/5] spi: cadence_qspi: rename ahbbase to
> flashbase for clarity
> 
> On 11 September 2015 at 23:58, Vikas Manocha <vikas.manocha at st.com>
> wrote:
> > plat->ahbbase renamed to plat->flashbase for better clarity.
> 
> Can you give short description about this rename.

With ahbbase it was not clear which base address it is, flashbase makes it clear that it is mapped flash memory base address.
I will add this info & send the next version.

Rgds,
Vikas

> 
> >
> > Signed-off-by: Vikas Manocha <vikas.manocha at st.com>
> > ---
> >
> > Changes in v6: none
> > Changes in v5: none
> > Changes in v4: new
> >
> >  drivers/spi/cadence_qspi.c     |    8 ++++----
> >  drivers/spi/cadence_qspi.h     |    4 ++--
> >  drivers/spi/cadence_qspi_apb.c |    4 ++--
> >  3 files changed, 8 insertions(+), 8 deletions(-)
> >
> > diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
> > index 0d1abc8..c63f583 100644
> > --- a/drivers/spi/cadence_qspi.c
> > +++ b/drivers/spi/cadence_qspi.c
> > @@ -150,7 +150,7 @@ static int cadence_spi_probe(struct udevice *bus)
> >         struct cadence_spi_priv *priv = dev_get_priv(bus);
> >
> >         priv->regbase = plat->regbase;
> > -       priv->ahbbase = plat->ahbbase;
> > +       priv->flashbase = plat->flashbase;
> >
> >         if (!priv->qspi_is_init) {
> >                 cadence_qspi_apb_controller_init(plat);
> > @@ -289,7 +289,7 @@ static int cadence_spi_ofdata_to_platdata(struct
> udevice *bus)
> >         }
> >
> >         plat->regbase = (void *)data[0];
> > -       plat->ahbbase = (void *)data[2];
> > +       plat->flashbase = (void *)data[2];
> >         plat->trigger_base = (u32 *)fdtdec_get_addr(blob, node,
> >
> > "cdns,trigger-address");
> >
> > @@ -313,8 +313,8 @@ static int cadence_spi_ofdata_to_platdata(struct
> udevice *bus)
> >         plat->tslch_ns = fdtdec_get_int(blob, subnode, "tslch-ns", 20);
> >         plat->sram_size = fdtdec_get_int(blob, node, "sram-size",
> > 128);
> >
> > -       debug("%s: regbase=%p ahbbase=%p trigger_base=%p max-
> frequency=%d page-size=%d\n",
> > -             __func__, plat->regbase, plat->ahbbase, plat->trigger_base,
> > +       debug("%s: regbase=%p flashbase=%p trigger_base=%p max-
> frequency=%d page-size=%d\n",
> > +             __func__, plat->regbase, plat->flashbase,
> > + plat->trigger_base,
> >               plat->max_hz, plat->page_size);
> >         return 0;
> >  }
> > diff --git a/drivers/spi/cadence_qspi.h b/drivers/spi/cadence_qspi.h
> > index 2f1bd92..7341339 100644
> > --- a/drivers/spi/cadence_qspi.h
> > +++ b/drivers/spi/cadence_qspi.h
> > @@ -17,7 +17,7 @@
> >  struct cadence_spi_platdata {
> >         unsigned int    max_hz;
> >         void            *regbase;
> > -       void            *ahbbase;
> > +       void            *flashbase;
> >         void            *trigger_base;
> >
> >         u32             page_size;
> > @@ -31,7 +31,7 @@ struct cadence_spi_platdata {
> >
> >  struct cadence_spi_priv {
> >         void            *regbase;
> > -       void            *ahbbase;
> > +       void            *flashbase;
> >         size_t          cmd_len;
> >         u8              cmd_buf[32];
> >         size_t          data_len;
> > diff --git a/drivers/spi/cadence_qspi_apb.c
> > b/drivers/spi/cadence_qspi_apb.c index 8156b2b..2638f00 100644
> > --- a/drivers/spi/cadence_qspi_apb.c
> > +++ b/drivers/spi/cadence_qspi_apb.c
> > @@ -704,7 +704,7 @@ int cadence_qspi_apb_indirect_read_setup(struct
> > cadence_spi_platdata *plat,
> >
> >         /* Get address */
> >         addr_value = cadence_qspi_apb_cmd2addr(&cmdbuf[1], addr_bytes);
> > -       writel((u32)plat->ahbbase + addr_value,
> > +       writel((u32)plat->flashbase + addr_value,
> >                plat->regbase + CQSPI_REG_INDIRECTRDSTARTADDR);
> >
> >         /* The remaining lenght is dummy bytes. */ @@ -795,7 +795,7 @@
> > int cadence_qspi_apb_indirect_write_setup(struct cadence_spi_platdata
> > *plat,
> >
> >         /* Setup write address. */
> >         reg = cadence_qspi_apb_cmd2addr(&cmdbuf[1], addr_bytes);
> > -       writel((u32)plat->ahbbase + reg,
> > +       writel((u32)plat->flashbase + reg,
> >                plat->regbase + CQSPI_REG_INDIRECTWRSTARTADDR);
> >
> >         reg = readl(plat->regbase + CQSPI_REG_SIZE);
> > --
> > 1.7.9.5
> >
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> 
> 
> 
> --
> Jagan | openedev.