[U-Boot] [PATCH v3 1/1] mpc85xx: Enable pre-relocation malloc for MPC85xx

[Mario Six]

To enable DM on MPC85xx, we need pre-relocation malloc, which is
implemented in this patch.

We also make sure that the IVORs are always 4-aligned on e500 to prevent
alignment exceptions caused by code changes in start.S.

Signed-off-by: Mario Six <mario.six at gdsys.cc>
Cc: York Sun <york.sun at nxp.com>
Cc: Simon Glass <sjg at chromium.org>
---

v3:
 - Add comment regarding gd zeroing
 - Unconditionally zero out initial RAM during startup

v2:
 - Correct IVOR alignment and remove nop hack
 - Add sanity check for length of malloc area


 arch/powerpc/cpu/mpc85xx/cpu_init_early.c |  8 +-------
 arch/powerpc/cpu/mpc85xx/start.S          | 30 ++++++++++++++++++++++++++++++
 include/ppc_asm.tmpl                      |  3 +++
 3 files changed, 34 insertions(+), 7 deletions(-)

diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
index 235a635..85b4112 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
@@ -82,7 +82,6 @@ void setup_ifc(void)
 void cpu_init_early_f(void *fdt)
 {
 	u32 mas0, mas1, mas2, mas3, mas7;
-	int i;
 #ifdef CONFIG_SYS_FSL_ERRATUM_P1010_A003549
 	ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
 #endif
@@ -95,12 +94,7 @@ void cpu_init_early_f(void *fdt)
 	/* Pointer is writable since we allocated a register for it */
 	gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);

-	/*
-	 * Clear initial global data
-	 *   we don't use memset so we can share this code with NAND_SPL
-	 */
-	for (i = 0; i < sizeof(gd_t); i++)
-		((char *)gd)[i] = 0;
+	/* gd area was zeroed during startup */

 #ifdef CONFIG_QEMU_E500
 	/*
diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index d867e2a..82a151a 100644
--- a/arch/powerpc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
@@ -1152,6 +1152,36 @@ _start_cont:
 	/* Setup the stack in initial RAM,could be L2-as-SRAM or L1 dcache*/
 	lis	r3,(CONFIG_SYS_INIT_RAM_ADDR)@h
 	ori	r3,r3,((CONFIG_SYS_INIT_SP_OFFSET-16)&~0xf)@l /* Align to 16 */
+
+#ifdef CONFIG_SYS_MALLOC_F_LEN
+
+#if CONFIG_SYS_MALLOC_F_LEN + GENERATED_GBL_DATA_SIZE > CONFIG_SYS_INIT_RAM_SIZE
+#error "CONFIG_SYS_MALLOC_F_LEN too large to fit into initial RAM."
+#endif
+
+	/* Leave 16+ byte for back chain termination and NULL return address */
+	subi	r3,r3,((CONFIG_SYS_MALLOC_F_LEN+16+15)&~0xf)
+#endif
+
+	/* End of RAM */
+	lis	r4,(CONFIG_SYS_INIT_RAM_ADDR)@h
+	ori	r4,r4,(CONFIG_SYS_INIT_RAM_SIZE)@l
+
+	li	r0,0
+
+1: 	subi 	r4,r4,4
+	stw 	r0,0(r4)
+	cmplw 	r4,r3
+	bne	1b
+
+#ifdef CONFIG_SYS_MALLOC_F_LEN
+	lis	r4,(CONFIG_SYS_INIT_RAM_ADDR)@h
+	ori	r4,r4,(CONFIG_SYS_GBL_DATA_OFFSET)@l
+
+	addi	r3,r3,16	/* Pre-relocation malloc area */
+	stw	r3,GD_MALLOC_BASE(r4)
+	subi	r3,r3,16
+#endif
 	li	r0,0
 	stw	r0,0(r3)	/* Terminate Back Chain */
 	stw	r0,+4(r3)	/* NULL return address. */
diff --git a/include/ppc_asm.tmpl b/include/ppc_asm.tmpl
index ba166eb..379c493 100644
--- a/include/ppc_asm.tmpl
+++ b/include/ppc_asm.tmpl
@@ -263,12 +263,14 @@
 	b	transfer_to_handler

 #define STD_EXCEPTION(n, label, hdlr)				\
+.align 4;							\
 label:								\
 	EXCEPTION_PROLOG(SRR0, SRR1);				\
 	addi	r3,r1,STACK_FRAME_OVERHEAD;			\
 	EXC_XFER_TEMPLATE(n, label, hdlr, MSR_KERNEL, NOCOPY)	\

 #define CRIT_EXCEPTION(n, label, hdlr)				\
+.align 4;							\
 label:								\
 	EXCEPTION_PROLOG(CSRR0, CSRR1);				\
 	addi	r3,r1,STACK_FRAME_OVERHEAD;			\
@@ -276,6 +278,7 @@ label:								\
 	MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE), NOCOPY)		\

 #define MCK_EXCEPTION(n, label, hdlr)				\
+.align 4;							\
 label:								\
 	EXCEPTION_PROLOG(MCSRR0, MCSRR1);			\
 	addi	r3,r1,STACK_FRAME_OVERHEAD;			\
--
2.7.0.GIT