[U-Boot] [PATCH 59/60] ARM: tegra: unify+move tegra.h to mach-tegra/
Stephen Warren
swarren at wwwdotorg.org
Tue Apr 19 22:59:39 CEST 2016
From: Stephen Warren <swarren at nvidia.com>
Most of arch/arm/include/asm/arch-tegra*/tegra.h is only used by code in
arch/arm/mach-tegra, so move the header files there to avoid polluting the
global include path. While moving, unify the per-SoC files into one using
a couple of simple ifdefs; this avoids having so many headers.
Many source files relied on <common.h> including the board config.h file,
which in turned used to include tegra.h. Now that we've removed this, we
need to include tegra.h from those files, hence this patch adds a few new
include statements.
A few defines from tegra.h are used by code outside mach-tegra. These are
dealt with as follows:
- A few drivers program clock registers directly and hence use
NV_PA_CLK_RST_BASE to locate the registers. Move this into clk_rst.h; that
makes sense since it defines the register layout and may as well define
the address too. Later patches will hopefully clean up the Tegra clock
driver and hide this information too.
- Various other definitions are used by the board config headers and/or
core U-Boot code (e.g. ARMv8 boot assembly). These can't include
SoC-specific headers from <mach/>. Hence, move those definitions into
tegra-common.h so they're generally available.
Signed-off-by: Stephen Warren <swarren at nvidia.com>
---
arch/arm/include/asm/arch-tegra/clk_rst.h | 2 ++
arch/arm/include/asm/arch-tegra114/tegra.h | 25 --------------
arch/arm/include/asm/arch-tegra124/tegra.h | 27 ---------------
arch/arm/include/asm/arch-tegra20/tegra.h | 20 -----------
arch/arm/include/asm/arch-tegra210/tegra.h | 29 ----------------
arch/arm/include/asm/arch-tegra30/tegra.h | 19 -----------
arch/arm/mach-tegra/ap.c | 2 +-
arch/arm/mach-tegra/board.c | 2 +-
arch/arm/mach-tegra/board2.c | 2 +-
arch/arm/mach-tegra/clock.c | 2 +-
arch/arm/mach-tegra/cmd_enterrcm.c | 2 +-
arch/arm/mach-tegra/cpu.c | 2 +-
arch/arm/mach-tegra/gpu.c | 2 +-
arch/arm/mach-tegra/i2c_early.c | 1 +
arch/arm/mach-tegra/lowlevel_init.S | 3 +-
arch/arm/mach-tegra/pinmux-common.c | 1 +
arch/arm/mach-tegra/powergate.c | 2 +-
arch/arm/mach-tegra/spl.c | 2 +-
arch/arm/mach-tegra/spl_uart.c | 1 +
.../{include/asm/arch-tegra => mach-tegra}/tegra.h | 39 ++++++++++++++++++----
arch/arm/mach-tegra/tegra114/clock.c | 2 +-
arch/arm/mach-tegra/tegra114/cpu.c | 2 +-
arch/arm/mach-tegra/tegra124/clock.c | 2 +-
arch/arm/mach-tegra/tegra124/cpu.c | 2 +-
arch/arm/mach-tegra/tegra124/psci.c | 1 +
arch/arm/mach-tegra/tegra20/clock.c | 2 +-
arch/arm/mach-tegra/tegra20/cpu.c | 2 +-
arch/arm/mach-tegra/tegra20/emc.c | 2 +-
arch/arm/mach-tegra/tegra20/pmu.c | 2 +-
arch/arm/mach-tegra/tegra20/sku.c | 1 +
arch/arm/mach-tegra/tegra20/warmboot.c | 2 +-
arch/arm/mach-tegra/tegra20/warmboot_avp.c | 2 +-
arch/arm/mach-tegra/tegra210/clock.c | 2 +-
arch/arm/mach-tegra/tegra210/xusb-padctl.c | 3 +-
arch/arm/mach-tegra/tegra30/clock.c | 2 +-
arch/arm/mach-tegra/tegra30/cpu.c | 2 +-
drivers/gpio/tegra_gpio.c | 2 ++
drivers/pci/pci_tegra.c | 1 +
include/configs/tegra-common.h | 14 ++++++--
39 files changed, 81 insertions(+), 152 deletions(-)
delete mode 100644 arch/arm/include/asm/arch-tegra114/tegra.h
delete mode 100644 arch/arm/include/asm/arch-tegra124/tegra.h
delete mode 100644 arch/arm/include/asm/arch-tegra20/tegra.h
delete mode 100644 arch/arm/include/asm/arch-tegra210/tegra.h
delete mode 100644 arch/arm/include/asm/arch-tegra30/tegra.h
rename arch/arm/{include/asm/arch-tegra => mach-tegra}/tegra.h (59%)
diff --git a/arch/arm/include/asm/arch-tegra/clk_rst.h b/arch/arm/include/asm/arch-tegra/clk_rst.h
index 304e1148cdcd..619793bfbef8 100644
--- a/arch/arm/include/asm/arch-tegra/clk_rst.h
+++ b/arch/arm/include/asm/arch-tegra/clk_rst.h
@@ -8,6 +8,8 @@
#ifndef _TEGRA_CLK_RST_H_
#define _TEGRA_CLK_RST_H_
+#define NV_PA_CLK_RST_BASE 0x60006000
+
/* PLL registers - there are several PLLs in the clock controller */
struct clk_pll {
uint pll_base; /* the control register */
diff --git a/arch/arm/include/asm/arch-tegra114/tegra.h b/arch/arm/include/asm/arch-tegra114/tegra.h
deleted file mode 100644
index f8407d178bce..000000000000
--- a/arch/arm/include/asm/arch-tegra114/tegra.h
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved.
- *
- * SPDX-License-Identifier: GPL-2.0
- */
-
-#ifndef _TEGRA114_H_
-#define _TEGRA114_H_
-
-#define NV_PA_SDRAM_BASE 0x80000000 /* 0x80000000 for real T114 */
-#define NV_PA_TSC_BASE 0x700F0000 /* System Counter TSC regs */
-#define NV_PA_MC_BASE 0x70019000
-
-#include <asm/arch-tegra/tegra.h>
-
-#define BCT_ODMDATA_OFFSET 1752 /* offset to ODMDATA word */
-
-#undef NVBOOTINFOTABLE_BCTSIZE
-#undef NVBOOTINFOTABLE_BCTPTR
-#define NVBOOTINFOTABLE_BCTSIZE 0x48 /* BCT size in BIT in IRAM */
-#define NVBOOTINFOTABLE_BCTPTR 0x4C /* BCT pointer in BIT in IRAM */
-
-#define MAX_NUM_CPU 4
-
-#endif /* TEGRA114_H */
diff --git a/arch/arm/include/asm/arch-tegra124/tegra.h b/arch/arm/include/asm/arch-tegra124/tegra.h
deleted file mode 100644
index f009925611c6..000000000000
--- a/arch/arm/include/asm/arch-tegra124/tegra.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * (C) Copyright 2013-2016
- * NVIDIA Corporation <www.nvidia.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef _TEGRA124_H_
-#define _TEGRA124_H_
-
-#define NV_PA_SDRAM_BASE 0x80000000
-#define NV_PA_TSC_BASE 0x700F0000 /* System Counter TSC regs */
-#define NV_PA_MC_BASE 0x70019000 /* Mem Ctlr regs (MCB, etc.) */
-#define NV_PA_AHB_BASE 0x6000C000 /* System regs (AHB, etc.) */
-
-#include <asm/arch-tegra/tegra.h>
-
-#define BCT_ODMDATA_OFFSET 1704 /* offset to ODMDATA word */
-
-#undef NVBOOTINFOTABLE_BCTSIZE
-#undef NVBOOTINFOTABLE_BCTPTR
-#define NVBOOTINFOTABLE_BCTSIZE 0x48 /* BCT size in BIT in IRAM */
-#define NVBOOTINFOTABLE_BCTPTR 0x4C /* BCT pointer in BIT in IRAM */
-
-#define MAX_NUM_CPU 4
-
-#endif /* _TEGRA124_H_ */
diff --git a/arch/arm/include/asm/arch-tegra20/tegra.h b/arch/arm/include/asm/arch-tegra20/tegra.h
deleted file mode 100644
index 1cea245e4171..000000000000
--- a/arch/arm/include/asm/arch-tegra20/tegra.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * (C) Copyright 2010-2016
- * NVIDIA Corporation <www.nvidia.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef _TEGRA20_H_
-#define _TEGRA20_H_
-
-#define NV_PA_SDRAM_BASE 0x00000000
-#define NV_PA_MC_BASE 0x7000F000
-
-#include <asm/arch-tegra/tegra.h>
-
-#define BCT_ODMDATA_OFFSET 4068 /* 12 bytes from end of BCT */
-
-#define MAX_NUM_CPU 2
-
-#endif /* TEGRA20_H */
diff --git a/arch/arm/include/asm/arch-tegra210/tegra.h b/arch/arm/include/asm/arch-tegra210/tegra.h
deleted file mode 100644
index 17b9f6af3679..000000000000
--- a/arch/arm/include/asm/arch-tegra210/tegra.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * (C) Copyright 2013-2016
- * NVIDIA Corporation <www.nvidia.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef _TEGRA210_TEGRA_H_
-#define _TEGRA210_TEGRA_H_
-
-#define GICD_BASE 0x50041000 /* Generic Int Cntrlr Distrib */
-#define GICC_BASE 0x50042000 /* Generic Int Cntrlr CPU I/F */
-#define NV_PA_AHB_BASE 0x6000C000 /* System regs (AHB, etc.) */
-#define NV_PA_TSC_BASE 0x700F0000 /* System Counter TSC regs */
-#define NV_PA_MC_BASE 0x70019000 /* Mem Ctlr regs (MCB, etc.) */
-#define NV_PA_SDRAM_BASE 0x80000000
-
-#include <asm/arch-tegra/tegra.h>
-
-#define BCT_ODMDATA_OFFSET 1288 /* offset to ODMDATA word */
-
-#undef NVBOOTINFOTABLE_BCTSIZE
-#undef NVBOOTINFOTABLE_BCTPTR
-#define NVBOOTINFOTABLE_BCTSIZE 0x48 /* BCT size in BIT in IRAM */
-#define NVBOOTINFOTABLE_BCTPTR 0x4C /* BCT pointer in BIT in IRAM */
-
-#define MAX_NUM_CPU 4
-
-#endif /* _TEGRA210_TEGRA_H_ */
diff --git a/arch/arm/include/asm/arch-tegra30/tegra.h b/arch/arm/include/asm/arch-tegra30/tegra.h
deleted file mode 100644
index 28f9741a1d76..000000000000
--- a/arch/arm/include/asm/arch-tegra30/tegra.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * Copyright (c) 2010-2016, NVIDIA CORPORATION. All rights reserved.
- *
- * SPDX-License-Identifier: GPL-2.0
- */
-
-#ifndef _TEGRA30_H_
-#define _TEGRA30_H_
-
-#define NV_PA_MC_BASE 0x7000F000
-#define NV_PA_SDRAM_BASE 0x80000000 /* 0x80000000 for real T30 */
-
-#include <asm/arch-tegra/tegra.h>
-
-#define BCT_ODMDATA_OFFSET 6116 /* 12 bytes from end of BCT */
-
-#define MAX_NUM_CPU 4
-
-#endif /* TEGRA30_H */
diff --git a/arch/arm/mach-tegra/ap.c b/arch/arm/mach-tegra/ap.c
index 3406e0efe4cb..fba8a6417135 100644
--- a/arch/arm/mach-tegra/ap.c
+++ b/arch/arm/mach-tegra/ap.c
@@ -11,11 +11,11 @@
#include <linux/bug.h>
#include <asm/io.h>
#include <asm/arch-tegra/clock.h>
-#include <asm/arch-tegra/tegra.h>
#include <soc/mc.h>
#include "cpu.h"
#include "pmc.h"
#include "scu.h"
+#include "tegra.h"
#ifndef CONFIG_ARM64
static void enable_scu(void)
diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c
index 1e7059798dcb..2f8b79b63d83 100644
--- a/arch/arm/mach-tegra/board.c
+++ b/arch/arm/mach-tegra/board.c
@@ -9,10 +9,10 @@
#include <spl.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
-#include <asm/arch/tegra.h>
#include <mach/board.h>
#include <soc/mc.h>
#include "pmc.h"
+#include "tegra.h"
void save_boot_params_ret(void);
diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c
index cc12073d8ada..3a5ba94c19c9 100644
--- a/arch/arm/mach-tegra/board2.c
+++ b/arch/arm/mach-tegra/board2.c
@@ -9,7 +9,6 @@
#include <errno.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
-#include <asm/arch/tegra.h>
#include <asm/arch-tegra/clk_rst.h>
#include "../../../drivers/usb/host/ehci-tegra-priv.h"
#include <mach/board.h>
@@ -22,6 +21,7 @@
#include "cpu.h"
#include "gpu.h"
#include "pmc.h"
+#include "tegra.h"
#ifdef CONFIG_TEGRA20_CLOCK_SCALING
#include "tegra20/emc.h"
#endif
diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c
index 1a6fc0151a60..e7f6aa7e04cc 100644
--- a/arch/arm/mach-tegra/clock.c
+++ b/arch/arm/mach-tegra/clock.c
@@ -10,11 +10,11 @@
#include <errno.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
-#include <asm/arch/tegra.h>
#include <asm/arch-tegra/clk_rst.h>
#include <div64.h>
#include <fdtdec.h>
#include "pmc.h"
+#include "tegra.h"
/*
* This is our record of the current clock rate of each clock. We don't
diff --git a/arch/arm/mach-tegra/cmd_enterrcm.c b/arch/arm/mach-tegra/cmd_enterrcm.c
index d5205c39ab79..7ceaa441cc49 100644
--- a/arch/arm/mach-tegra/cmd_enterrcm.c
+++ b/arch/arm/mach-tegra/cmd_enterrcm.c
@@ -26,8 +26,8 @@
*/
#include <common.h>
-#include <asm/arch/tegra.h>
#include "pmc.h"
+#include "tegra.h"
static int do_enterrcm(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
diff --git a/arch/arm/mach-tegra/cpu.c b/arch/arm/mach-tegra/cpu.c
index eb9222b2f23d..aa72cc297c84 100644
--- a/arch/arm/mach-tegra/cpu.c
+++ b/arch/arm/mach-tegra/cpu.c
@@ -7,12 +7,12 @@
#include <common.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
-#include <asm/arch/tegra.h>
#include <asm/arch-tegra/clk_rst.h>
#include "cpu.h"
#include "pllx.h"
#include "pmc.h"
#include "scu.h"
+#include "tegra.h"
static inline void pllx_set_iddq(void)
{
diff --git a/arch/arm/mach-tegra/gpu.c b/arch/arm/mach-tegra/gpu.c
index 36204f54e4c9..1410be04bb86 100644
--- a/arch/arm/mach-tegra/gpu.c
+++ b/arch/arm/mach-tegra/gpu.c
@@ -9,9 +9,9 @@
#include <common.h>
#include <fdt_support.h>
#include <asm/io.h>
-#include <asm/arch/tegra.h>
#include <soc/mc.h>
#include "gpu.h"
+#include "tegra.h"
static bool _configured;
diff --git a/arch/arm/mach-tegra/i2c_early.c b/arch/arm/mach-tegra/i2c_early.c
index dcdd86cef71e..141867043b56 100644
--- a/arch/arm/mach-tegra/i2c_early.c
+++ b/arch/arm/mach-tegra/i2c_early.c
@@ -9,6 +9,7 @@
#include <common.h>
#include <asm/io.h>
#include <mach/tegra_i2c.h>
+#include "tegra.h"
#include "../../../drivers/i2c/tegra_i2c_priv.h"
void tegra_i2c_ll_write_addr(uint addr, uint config)
diff --git a/arch/arm/mach-tegra/lowlevel_init.S b/arch/arm/mach-tegra/lowlevel_init.S
index 1273f94aa38e..912cf85bff1c 100644
--- a/arch/arm/mach-tegra/lowlevel_init.S
+++ b/arch/arm/mach-tegra/lowlevel_init.S
@@ -1,7 +1,7 @@
/*
* SoC-specific setup info
*
- * (C) Copyright 2010,2011
+ * (C) Copyright 2010-2016
* NVIDIA Corporation <www.nvidia.com>
*
* SPDX-License-Identifier: GPL-2.0+
@@ -9,6 +9,7 @@
#include <config.h>
#include <linux/linkage.h>
+#include "tegra.h"
#ifdef CONFIG_ARM64
.align 5
diff --git a/arch/arm/mach-tegra/pinmux-common.c b/arch/arm/mach-tegra/pinmux-common.c
index faa406e077a4..b894c04c1db1 100644
--- a/arch/arm/mach-tegra/pinmux-common.c
+++ b/arch/arm/mach-tegra/pinmux-common.c
@@ -8,6 +8,7 @@
#include <common.h>
#include <asm/io.h>
#include <mach/pinmux.h>
+#include "tegra.h"
/* return 1 if a pingrp is in range */
#define pmux_pingrp_isvalid(pin) (((pin) >= 0) && ((pin) < PMUX_PINGRP_COUNT))
diff --git a/arch/arm/mach-tegra/powergate.c b/arch/arm/mach-tegra/powergate.c
index 04205bb10cbb..17357e9f1b7f 100644
--- a/arch/arm/mach-tegra/powergate.c
+++ b/arch/arm/mach-tegra/powergate.c
@@ -9,9 +9,9 @@
#include <asm/io.h>
#include <asm/types.h>
-#include <asm/arch/tegra.h>
#include <mach/powergate.h>
#include <soc/flow.h>
+#include "tegra.h"
#define PWRGATE_TOGGLE 0x30
#define PWRGATE_TOGGLE_START (1 << 8)
diff --git a/arch/arm/mach-tegra/spl.c b/arch/arm/mach-tegra/spl.c
index 353a6ddfb6c2..d5e709406e8b 100644
--- a/arch/arm/mach-tegra/spl.c
+++ b/arch/arm/mach-tegra/spl.c
@@ -12,12 +12,12 @@
#include <asm/io.h>
#include <asm/arch/clock.h>
-#include <asm/arch/tegra.h>
#include <asm/spl.h>
#include <mach/board.h>
#include <mach/board_init.h>
#include "apb_misc.h"
#include "cpu.h"
+#include "tegra.h"
/* TODO(sjg at chromium.org): Remove once SPL supports device tree */
U_BOOT_DEVICE(tegra_gpios) = {
diff --git a/arch/arm/mach-tegra/spl_uart.c b/arch/arm/mach-tegra/spl_uart.c
index 2c1d237174fd..163e6443e821 100644
--- a/arch/arm/mach-tegra/spl_uart.c
+++ b/arch/arm/mach-tegra/spl_uart.c
@@ -9,6 +9,7 @@
#include <ns16550.h>
#include <asm/arch/clock.h>
#include <mach/spl_uart.h>
+#include "tegra.h"
static struct ns16550_platdata ns16550_com1_pdata = {
.reg_shift = 2,
diff --git a/arch/arm/include/asm/arch-tegra/tegra.h b/arch/arm/mach-tegra/tegra.h
similarity index 59%
rename from arch/arm/include/asm/arch-tegra/tegra.h
rename to arch/arm/mach-tegra/tegra.h
index 71c9374c7ae0..0e8d8a22cd55 100644
--- a/arch/arm/include/asm/arch-tegra/tegra.h
+++ b/arch/arm/mach-tegra/tegra.h
@@ -5,17 +5,15 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-#ifndef _TEGRA_H_
-#define _TEGRA_H_
+#ifndef _TEGRA_TEGRA_H
+#define _TEGRA_TEGRA_H
/* AP base physical address of internal SRAM */
#define NV_PA_BASE_SRAM 0x40000000
#define NV_PA_ARM_PERIPHBASE 0x50040000
#define NV_PA_PG_UP_BASE 0x60000000
-#define NV_PA_TMRUS_BASE 0x60005010
-#define NV_PA_CLK_RST_BASE 0x60006000
#define NV_PA_FLOW_BASE 0x60007000
-#define NV_PA_GPIO_BASE 0x6000D000
+#define NV_PA_AHB_BASE 0x6000C000
#define NV_PA_EVP_BASE 0x6000F000
#define NV_PA_APB_MISC_BASE 0x70000000
#define NV_PA_APB_UARTA_BASE (NV_PA_APB_MISC_BASE + 0x6000)
@@ -32,6 +30,12 @@
#else
#define NV_PA_CSITE_BASE 0x70800000
#endif
+#if defined(CONFIG_TEGRA20) || defined(CONFIG_TEGRA30)
+#define NV_PA_MC_BASE 0x7000f000
+#else
+#define NV_PA_MC_BASE 0x70019000
+#endif
+#define NV_PA_TSC_BASE 0x700f0000
#define PG_UP_TAG_0 0x0
#define PG_UP_TAG_AVP 0xAAAAAAAA
@@ -39,11 +43,34 @@
/* Address at which WB code runs, it must not overlap Bootrom's IRAM usage */
#define NV_WB_RUN_ADDRESS 0x40020000
+#if defined(CONFIG_TEGRA20)
+#define BCT_ODMDATA_OFFSET 4068 /* 12 bytes from end of BCT */
+#elif defined(CONFIG_TEGRA30)
+#define BCT_ODMDATA_OFFSET 6116 /* 12 bytes from end of BCT */
+#elif defined(CONFIG_TEGRA114)
+#define BCT_ODMDATA_OFFSET 1752 /* offset to ODMDATA word */
+#elif defined(CONFIG_TEGRA124)
+#define BCT_ODMDATA_OFFSET 1704 /* offset to ODMDATA word */
+#elif defined(CONFIG_TEGRA210)
+#define BCT_ODMDATA_OFFSET 1288 /* offset to ODMDATA word */
+#endif
+
#define NVBOOTTYPE_RECOVERY 2 /* BR entered RCM */
#define NVBOOTINFOTABLE_BOOTTYPE 0xC /* Boot type in BIT in IRAM */
+#if defined(CONFIG_TEGRA20) || defined(CONFIG_TEGRA30)
#define NVBOOTINFOTABLE_BCTSIZE 0x38 /* BCT size in BIT in IRAM */
#define NVBOOTINFOTABLE_BCTPTR 0x3C /* BCT pointer in BIT in IRAM */
+#else
+#define NVBOOTINFOTABLE_BCTSIZE 0x48 /* BCT size in BIT in IRAM */
+#define NVBOOTINFOTABLE_BCTPTR 0x4C /* BCT pointer in BIT in IRAM */
+#endif
+
+#if defined(CONFIG_TEGRA20)
+#define MAX_NUM_CPU 2
+#else
+#define MAX_NUM_CPU 4
+#endif
#define PRM_RSTCTRL NV_PA_PMC_BASE
-#endif /* TEGRA_H */
+#endif
diff --git a/arch/arm/mach-tegra/tegra114/clock.c b/arch/arm/mach-tegra/tegra114/clock.c
index 155353d44c52..39d8523ab1f0 100644
--- a/arch/arm/mach-tegra/tegra114/clock.c
+++ b/arch/arm/mach-tegra/tegra114/clock.c
@@ -10,11 +10,11 @@
#include <common.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
-#include <asm/arch/tegra.h>
#include <asm/arch-tegra/clk_rst.h>
#include <div64.h>
#include <fdtdec.h>
#include "../sysctr.h"
+#include "../tegra.h"
/*
* Clock types that we can use as a source. The Tegra114 has muxes for the
diff --git a/arch/arm/mach-tegra/tegra114/cpu.c b/arch/arm/mach-tegra/tegra114/cpu.c
index 423ace4a2ebd..388c03002b88 100644
--- a/arch/arm/mach-tegra/tegra114/cpu.c
+++ b/arch/arm/mach-tegra/tegra114/cpu.c
@@ -8,12 +8,12 @@
#include <common.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
-#include <asm/arch/tegra.h>
#include <asm/arch-tegra/clk_rst.h>
#include <mach/pinmux.h>
#include <soc/flow.h>
#include "../cpu.h"
#include "../pmc.h"
+#include "../tegra.h"
/* Tegra114-specific CPU init code */
static void enable_cpu_power_rail(void)
diff --git a/arch/arm/mach-tegra/tegra124/clock.c b/arch/arm/mach-tegra/tegra124/clock.c
index dc060a6db569..692b82f336c0 100644
--- a/arch/arm/mach-tegra/tegra124/clock.c
+++ b/arch/arm/mach-tegra/tegra124/clock.c
@@ -10,11 +10,11 @@
#include <common.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
-#include <asm/arch/tegra.h>
#include <asm/arch-tegra/clk_rst.h>
#include <div64.h>
#include <fdtdec.h>
#include "../sysctr.h"
+#include "../tegra.h"
/*
* Clock types that we can use as a source. The Tegra124 has muxes for the
diff --git a/arch/arm/mach-tegra/tegra124/cpu.c b/arch/arm/mach-tegra/tegra124/cpu.c
index c01d36c11c4b..aa4b5581dd75 100644
--- a/arch/arm/mach-tegra/tegra124/cpu.c
+++ b/arch/arm/mach-tegra/tegra124/cpu.c
@@ -8,12 +8,12 @@
#include <common.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
-#include <asm/arch/tegra.h>
#include <asm/arch-tegra/clk_rst.h>
#include <mach/pinmux.h>
#include <soc/flow.h>
#include "../cpu.h"
#include "../pmc.h"
+#include "../tegra.h"
/* Tegra124-specific CPU init code */
diff --git a/arch/arm/mach-tegra/tegra124/psci.c b/arch/arm/mach-tegra/tegra124/psci.c
index 27f9e60e1372..ea3966a99c94 100644
--- a/arch/arm/mach-tegra/tegra124/psci.c
+++ b/arch/arm/mach-tegra/tegra124/psci.c
@@ -13,6 +13,7 @@
#include <soc/flow.h>
#include "../cpu.h"
#include "../pmc.h"
+#include "../tegra.h"
static void park_cpu(void)
{
diff --git a/arch/arm/mach-tegra/tegra20/clock.c b/arch/arm/mach-tegra/tegra20/clock.c
index 0ff538830abd..182ab6f50db8 100644
--- a/arch/arm/mach-tegra/tegra20/clock.c
+++ b/arch/arm/mach-tegra/tegra20/clock.c
@@ -12,10 +12,10 @@
#include <errno.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
-#include <asm/arch/tegra.h>
#include <asm/arch-tegra/clk_rst.h>
#include <div64.h>
#include <fdtdec.h>
+#include "../tegra.h"
/*
* Clock types that we can use as a source. The Tegra20 has muxes for the
diff --git a/arch/arm/mach-tegra/tegra20/cpu.c b/arch/arm/mach-tegra/tegra20/cpu.c
index 10205dca5e53..d094487fcfa3 100644
--- a/arch/arm/mach-tegra/tegra20/cpu.c
+++ b/arch/arm/mach-tegra/tegra20/cpu.c
@@ -6,9 +6,9 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/arch/tegra.h>
#include "../cpu.h"
#include "../pmc.h"
+#include "../tegra.h"
static void enable_cpu_power_rail(void)
{
diff --git a/arch/arm/mach-tegra/tegra20/emc.c b/arch/arm/mach-tegra/tegra20/emc.c
index fa694d1fda84..c089e7a8ed0d 100644
--- a/arch/arm/mach-tegra/tegra20/emc.c
+++ b/arch/arm/mach-tegra/tegra20/emc.c
@@ -9,9 +9,9 @@
#include <fdtdec.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
-#include <asm/arch/tegra.h>
#include "../apb_misc.h"
#include "../emc.h"
+#include "../tegra.h"
#include "emc_priv.h"
#include "sku.h"
diff --git a/arch/arm/mach-tegra/tegra20/pmu.c b/arch/arm/mach-tegra/tegra20/pmu.c
index ac24c6b3ac1d..4b4d7bebc0d2 100644
--- a/arch/arm/mach-tegra/tegra20/pmu.c
+++ b/arch/arm/mach-tegra/tegra20/pmu.c
@@ -9,8 +9,8 @@
#include <i2c.h>
#include <tps6586x.h>
#include <asm/io.h>
-#include <asm/arch/tegra.h>
#include <mach/tegra_i2c.h>
+#include "../tegra.h"
#include "sku.h"
#define VDD_CORE_NOMINAL_T25 0x17 /* 1.3v */
diff --git a/arch/arm/mach-tegra/tegra20/sku.c b/arch/arm/mach-tegra/tegra20/sku.c
index 56c9e97e2454..9ddf4436de08 100644
--- a/arch/arm/mach-tegra/tegra20/sku.c
+++ b/arch/arm/mach-tegra/tegra20/sku.c
@@ -6,6 +6,7 @@
#include <common.h>
#include <asm/io.h>
+#include "../tegra.h"
#include "fuse.h"
/* These are the available SKUs (product types) for Tegra20 */
diff --git a/arch/arm/mach-tegra/tegra20/warmboot.c b/arch/arm/mach-tegra/tegra20/warmboot.c
index 26db8a1477a5..1f3f3843b438 100644
--- a/arch/arm/mach-tegra/tegra20/warmboot.c
+++ b/arch/arm/mach-tegra/tegra20/warmboot.c
@@ -9,11 +9,11 @@
#include <asm/io.h>
#include <asm/errno.h>
#include <asm/arch/clock.h>
-#include <asm/arch/tegra.h>
#include <asm/arch-tegra/clk_rst.h>
#include "../apb_misc.h"
#include "../emc.h"
#include "../pmc.h"
+#include "../tegra.h"
#include "crypto.h"
#include "emc_priv.h"
#include "fuse.h"
diff --git a/arch/arm/mach-tegra/tegra20/warmboot_avp.c b/arch/arm/mach-tegra/tegra20/warmboot_avp.c
index 07aa542c11b0..82722b5b52ec 100644
--- a/arch/arm/mach-tegra/tegra20/warmboot_avp.c
+++ b/arch/arm/mach-tegra/tegra20/warmboot_avp.c
@@ -8,12 +8,12 @@
#include <common.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
-#include <asm/arch/tegra.h>
#include <asm/arch-tegra/clk_rst.h>
#include <soc/flow.h>
#include "../apb_misc.h"
#include "../cpu.h"
#include "../pmc.h"
+#include "../tegra.h"
#include "warmboot.h"
#include "warmboot_avp.h"
diff --git a/arch/arm/mach-tegra/tegra210/clock.c b/arch/arm/mach-tegra/tegra210/clock.c
index d2d517b2c711..830ff6d267c6 100644
--- a/arch/arm/mach-tegra/tegra210/clock.c
+++ b/arch/arm/mach-tegra/tegra210/clock.c
@@ -11,11 +11,11 @@
#include <errno.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
-#include <asm/arch/tegra.h>
#include <asm/arch-tegra/clk_rst.h>
#include <div64.h>
#include <fdtdec.h>
#include "../sysctr.h"
+#include "../tegra.h"
/*
* Clock types that we can use as a source. The Tegra210 has muxes for the
diff --git a/arch/arm/mach-tegra/tegra210/xusb-padctl.c b/arch/arm/mach-tegra/tegra210/xusb-padctl.c
index 9ec93e7c4c4c..44523c5b385b 100644
--- a/arch/arm/mach-tegra/tegra210/xusb-padctl.c
+++ b/arch/arm/mach-tegra/tegra210/xusb-padctl.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved.
+ * Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0
*/
@@ -12,6 +12,7 @@
#include "../xusb-padctl-common.h"
#include <asm/arch/clock.h>
+#include <asm/arch-tegra/clk_rst.h>
#include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
diff --git a/arch/arm/mach-tegra/tegra30/clock.c b/arch/arm/mach-tegra/tegra30/clock.c
index 98289b8ac7a7..dca6d1118b3b 100644
--- a/arch/arm/mach-tegra/tegra30/clock.c
+++ b/arch/arm/mach-tegra/tegra30/clock.c
@@ -11,10 +11,10 @@
#include <errno.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
-#include <asm/arch/tegra.h>
#include <asm/arch-tegra/clk_rst.h>
#include <div64.h>
#include <fdtdec.h>
+#include "../tegra.h"
/*
* Clock types that we can use as a source. The Tegra30 has muxes for the
diff --git a/arch/arm/mach-tegra/tegra30/cpu.c b/arch/arm/mach-tegra/tegra30/cpu.c
index f7cffb7d5106..ac234da59d50 100644
--- a/arch/arm/mach-tegra/tegra30/cpu.c
+++ b/arch/arm/mach-tegra/tegra30/cpu.c
@@ -7,12 +7,12 @@
#include <common.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
-#include <asm/arch/tegra.h>
#include <asm/arch-tegra/clk_rst.h>
#include <mach/tegra_i2c.h>
#include <soc/flow.h>
#include "../cpu.h"
#include "../pmc.h"
+#include "../tegra.h"
/* Tegra30-specific CPU init code */
diff --git a/drivers/gpio/tegra_gpio.c b/drivers/gpio/tegra_gpio.c
index 152c303c4acf..894a12770cc0 100644
--- a/drivers/gpio/tegra_gpio.c
+++ b/drivers/gpio/tegra_gpio.c
@@ -24,6 +24,8 @@
#include <mach/tegra_gpio.h>
#include "tegra_gpio_priv.h"
+#define NV_PA_GPIO_BASE 0x6000D000
+
DECLARE_GLOBAL_DATA_PTR;
static const int CONFIG_SFIO = 0;
diff --git a/drivers/pci/pci_tegra.c b/drivers/pci/pci_tegra.c
index 392ebde1e05c..f19e213bd7bd 100644
--- a/drivers/pci/pci_tegra.c
+++ b/drivers/pci/pci_tegra.c
@@ -23,6 +23,7 @@
#include <asm/gpio.h>
#include <asm/arch/clock.h>
+#include <asm/arch-tegra/clk_rst.h>
#include <mach/powergate.h>
#include <mach/xusb-padctl.h>
diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h
index b6506e2fb3df..332382aec87d 100644
--- a/include/configs/tegra-common.h
+++ b/include/configs/tegra-common.h
@@ -10,14 +10,24 @@
#include <linux/sizes.h>
#include <linux/stringify.h>
+#define NV_PA_TMRUS_BASE 0x60005010
+#ifdef CONFIG_TEGRA20
+#define NV_PA_SDRAM_BASE 0x00000000
+#else
+#define NV_PA_SDRAM_BASE 0x80000000
+#endif
+
+#ifdef CONFIG_ARM64
+#define GICD_BASE 0x50041000
+#define GICC_BASE 0x50042000
+#endif
+
/*
* High Level Configuration Options
*/
#define CONFIG_ARMCORTEXA9 /* This is an ARM V7 CPU core */
#define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */
-#include <asm/arch/tegra.h> /* get chip and board defs */
-
/* Use the Tegra US timer on ARMv7, but the architected timer on ARMv8. */
#ifndef CONFIG_ARM64
#define CONFIG_SYS_TIMER_RATE 1000000
--
2.8.1
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