[U-Boot] [PATCH] powerpc/mpc85xx: set L2PE in L2CSR0 before enabling L2 cache

[Aneesh Bansal]

> >>> While enabling L2 cache, the value of L2PE (L2 cache parity/ECC
> >>> error checking enable) must not be changed while the L2 cache is enabled.
> >>> So, L2PE must be set before enabling L2 cache.
> >>
> >> Aneesh,
> >>
> >> The original code set L2PE and L2E together. The L2PE bit doesn't change after
> that.
> >> Doesn't this satisfy the requirement? Did you observe any failure before your
> patch?
> >>
> >> York
> >
> > e6500 block guide states that "The value of L2PE must not be changed while the L2
> cache is enabled"
> > So, when both the bits are set together, it might lead to L2 cache
> > getting enabled first and L2PE getting set after that. So L2PE is getting changed from
> 0 to 1 while L2 is still enabled which should not be done.
> >
> > In normal non-secure boot, U-Boot is the first to use L2 after reset
> > but in case of secure boot, L2 is used by Bot ROM before U-Boot. If
> > L2PE and L2E are done together, ECC errors are observed on L2 (L2CAPTECC - L2
> cache error capture ECC syndrome) and U-Boot crashes.
> >
> > I believe this is because of ECC/Parity checking not getting enabled
> > properly and resulting into erroneous detection of errors
> >
> > When this is changed to setting L2PE before L2E, or not setting L2PE
> > at all i.e. disabling ECC error checks, no ECC errors are observed and U-Boot works
> fine.
> >
> 
> Aneesh,
> 
> You said for secure boot L2 cache was used by bootrom before U-Boot. Could the
> L2 cache be left enabled when U-Boot runs? If true, that indeed sets L2PE bit while
> L2E is enabled. Please confirm.
> 
> If L2E was left set by secure boot, your change actually fixes it, but the commit
> message needs to be rewritten.

L2 is not left enabled by Boot ROM in case of Secure Boot. The IBR code enables
L2 but disables it before transferring control to U-Boot.
What I was trying to suggest is that the way we are enabling L2 in U-Boot seems to
be incorrect as we are setting L2PE and L2E simultaneously. This does not cause any
issues in case of non-secure boot as U-Boot is the first entity to enable and use L2 cache.

But in case of secure boot, L2 is enabled, used and disabled by Boot ROM first. Now in
U-Boot, if ECC/Parity checking is not enabled correctly then it starts reporting ECC errors
randomly and U-Boot crashes.

After making this change, no ECC errors are observed and U-Boot starts working correct
in case of non-secure boot.