[U-Boot] [PATCH] ts4800: add CONFIG_SYS_FSL_ERRATUM_ESDHC_A001

Sebastien Bourdelin sebastien.bourdelin at savoirfairelinux.com
Thu Apr 21 23:39:48 CEST 2016


Hi,
I add Fabio Estevam in the loop as suggested by Marek Vasut on IRC.

On 04/21/2016 01:37 PM, Sebastien Bourdelin wrote:
> This commit fixes the MMC data transactions timeout problem on the
> TS4800.
>
> The changes introduced in the commit e978a31 on the timeout calculation
> for the MMC data transactions has revealed there is something wrong with
> the timeout setting of the eSDHC controller used in the IMX51.
>
> The IMX51 seems to be concerned by this erratum and without this change
> the MMC driver is unable to do any transactions.
>
> Signed-off-by: Sebastien Bourdelin <sebastien.bourdelin at savoirfairelinux.com>
> ---
>  include/configs/ts4800.h | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/include/configs/ts4800.h b/include/configs/ts4800.h
> index fcc9d80..5e5e4d3 100644
> --- a/include/configs/ts4800.h
> +++ b/include/configs/ts4800.h
> @@ -63,6 +63,8 @@
>  #define CONFIG_FSL_ESDHC
>  #define CONFIG_SYS_FSL_ESDHC_ADDR	MMC_SDHC1_BASE_ADDR
>  
> +#define CONFIG_SYS_FSL_ERRATUM_ESDHC_A001
> +
>  #define CONFIG_MMC
>  
>  #define CONFIG_CMD_MMC

The problem we found is related to the DTOCV field in the system control
register of the IMX51's eSDHC controller.  If we set the value 4, 8 or
12 in this DTOCV field the MMC driver is unable to do any data
transactions, we have a timeout (i.e: the DTOE field in the Interrupt
status register of the eSDHC controller is set to 1).
It works with other values, at least i tried with 5, 9, 11, 13 without
having any timeout.

Our guess and because we didn't find any errata related to this issue
for the IMX51 is that this device is impacted by the same problem then
devices MPC83XX and MPC85XX (see the ESDHC-A001 errata in the datasheet:
http://pdf.datasheetarchive.com/indexerfiles/Datasheets-SW1/DSASW0012367.pdf)

Perhaps someone from Freescale can give us more informations.

Regards,
Sebastien.


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