[U-Boot] [PATCH 2/5] ARM: tegra: add PCIe controller to Tegra186 SoC DT

Simon Glass sjg at chromium.org
Mon Aug 1 03:02:34 CEST 2016


On 27 July 2016 at 15:48, Stephen Warren <swarren at wwwdotorg.org> wrote:
> From: Stephen Warren <swarren at nvidia.com>
>
> The Tegra186 PCIe DT content is almost identical to previous chips, except
> that the:
>
> - There are 3 ports instead of 2.
> - Some physical addresses have moved.
> - PHY programming is handled by firmware, so CCPLEX DTs don't need to
>   reference any PHY.
> - The power domain is explicitly represented in DT. This change is
>   mandatory for Tegra186 since standard power domain APIs are used, and
>   should be made to the DT for older SoCs, although we get away without
>   doing so since U-Boot currently uses custom APIs that hard-code power
>   domain IDs.
>
> Signed-off-by: Stephen Warren <swarren at nvidia.com>
> ---
>  arch/arm/dts/tegra186.dtsi | 92 ++++++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 92 insertions(+)

Reviewed-by: Simon Glass <sjg at chromium.org>


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