[U-Boot] tegra124 jetson-tk1 ethernet problems.

Peter Chubb Peter.Chubb at data61.csiro.au
Tue Aug 2 05:20:48 CEST 2016


Hi Folks,
   Since patch 96350f729c42 "dm: tegra: net: Convert tegra boards to
   driver model for Ethernet" booting via dhcp has been broken on the
   Jetson TK1.

   I tried applying "net: Probe PCI before looking for ethernet
   devices"; this `works' in that the ethernet device is detected and
   works,  but I end up with huge numbers of
      CACHE: Misaligned operation at range [fffb8c00, fffb8c2e]
   messages on the serial console.

   These come from the flush_cache() calls in net/rtl8169.c.  I
   suggest the attached patch (or something like it):


diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c
index 1cc0b40..ebbadd2 100644
--- a/drivers/net/rtl8169.c
+++ b/drivers/net/rtl8169.c
@@ -476,7 +476,10 @@ static void rtl_inval_rx_desc(struct RxDesc *desc)
 static void rtl_flush_rx_desc(struct RxDesc *desc)
 {
 #ifndef CONFIG_SYS_NONCACHED_MEMORY
-	flush_cache((unsigned long)desc, sizeof(*desc));
+    	unsigned long start = (unsigned long)desc & ~(ARCH_DMA_MINALIGN - 1);
+	unsigned long size = ALIGN(sizeof(*desc), ARCH_DMA_MINALIGN);
+
+	flush_cache(start, size);
 #endif
 }
 
@@ -493,21 +496,28 @@ static void rtl_inval_tx_desc(struct TxDesc *desc)
 static void rtl_flush_tx_desc(struct TxDesc *desc)
 {
 #ifndef CONFIG_SYS_NONCACHED_MEMORY
-	flush_cache((unsigned long)desc, sizeof(*desc));
+	unsigned long start = (unsigned long)desc & ~(ARCH_DMA_MINALIGN - 1);
+	unsigned long sz = ALIGN(sizeof *desc, ARCH_DMA_MINALIGN);
+
+	flush_cache(start, sz);
 #endif
 }
 
 static void rtl_inval_buffer(void *buf, size_t size)
 {
-	unsigned long start = (unsigned long)buf & ~(ARCH_DMA_MINALIGN - 1);
-	unsigned long end = ALIGN(start + size, ARCH_DMA_MINALIGN);
+	unsigned long end = ALIGN((unsigned long)buf + size, ARCH_DMA_MINALIGN);
 
-	invalidate_dcache_range(start, end);
+        /* buf is aligned to RTL8169_ALIGN, 
+         * which is a multiple of ARCH_DMA_ALIGN 
+         */
+	invalidate_dcache_range((unsigned long)buf, end);
 }
 
 static void rtl_flush_buffer(void *buf, size_t size)
 {
-	flush_cache((unsigned long)buf, size);
+	unsigned long sz = ALIGN(size, ARCH_DMA_MINALIGN);
+
+	flush_cache((unsigned long)buf, sz);
 }
 
 /**************************************************************************


-- 
Dr Peter Chubb	       Tel: +61 2 9490 5852      http://www.data61.csiro.au
http://www.ssrg.nicta.com.au   Software Systems Research Group/NICTA/Data61


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