[U-Boot] [PATCH] mtd: nand: mxs: fix cache alignment for cache lines >32

[Hannes Schmelzer]

On 08/03/2016 08:09 PM, Tom Rini wrote:
> On Wed, Aug 03, 2016 at 02:39:47PM -0300, Fabio Estevam wrote:
>> On Wed, Aug 3, 2016 at 1:13 PM, Stefan Agner <stefan at agner.ch> wrote:
>>
>>> As you noted, this particular case is due to cache flush of the page
>>> table and should be fixed with:
>>> arm: cache: always flush cache line size for page table
>> Yes, just noticed that on a imx7d-sdb I still get these cache warnings
>> even with "arm: cache: always flush cache line size for page table"
>> applied:
>>
>> ....
>> Filename 'zImage'.
>> Load address: 0x80800000
>> Loading: #################################################################
>>           #################################################################
>>           #################################################################
>>           #################################################################
>>           #################################################################
>>           #################################################################
>>           #################################################################
>>           #############################################
>>           9.1 MiB/s
>> done
>> Bytes transferred = 7334512 (6fea70 hex)
>> CACHE: Misaligned operation at range [80800000, 80efea70]
> I feel like we must have done something wrong of late, can you bisect
> when these came in?  Thanks!
The mistake(s) must have been long time ago, but since commit 
bcc53bf095893fbdae531a9a7b5d4ef4a125a7fc it comes out visible.

I think we have to check every those warning for correct alignment.

cheers,
Hannes