[U-Boot] [PATCH 0/6] sh4: fix and simplify cache manipulation

[Vladimir Zapolskiy]

In my tests I experience that sometimes SH4 does not properly
fetch instructions after immediate jump to a code loaded by
means of rtl8139, the problem is gone if "icache off" is
executed after load or if cache invalidation and write-back
is used on data load instead of just cache invalidation,
which is apparently an improper backbone of flush_dcache_range()
function.

The changeset contains a couple of bugfixes and a general
simplification of the code related to cache manipulation. Note
that while caches are found on SH2 and SH3 for long time
they were inactive in U-Boot, because I don't have SH2/SH3
hardware for testing I don't spread SH4 cache fixes to those
cpus, however generally it should be the same, in that case
arch/sh/cpu/sh4/cache.c file can be moved to arch/sh/lib
folder

For 3/6 patch there is a minor patch application dependency on
one change https://patchwork.ozlabs.org/patch/656383/ , so
formally it might be easier to apply the series after the
series, which switches SH architectures to generic board.

Vladimir Zapolskiy (6):
  sh4: cache: correct dcache flush to invalidate with write-back
  sh4: cache: correct flush_cache() to writeback and invalidate
  sh3: remove unused cache.c file from being built
  sh: cache use jump_to_P2() and back_to_P1() from asm/system.h
  sh: cache: don't modify CCR from P1 area
  sh4: cache: move exported cache manipulation functions into cache.c

 arch/sh/cpu/sh3/Makefile    |  2 +-
 arch/sh/cpu/sh3/cache.c     | 96 ---------------------------------------------
 arch/sh/cpu/sh4/cache.c     | 88 ++++++++++++++++++++---------------------
 arch/sh/cpu/sh4/cpu.c       | 34 ----------------
 arch/sh/include/asm/cache.h |  2 -
 5 files changed, 43 insertions(+), 179 deletions(-)
 delete mode 100644 arch/sh/cpu/sh3/cache.c

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2.8.1