[U-Boot] [PATCH 11/14] ARM: uniphier: fix CONFIG_SYS_CACHELINE_SIZE when outer cache is on

[Masahiro Yamada]

The UniPhier outer cache (L2 cache on ARMv7 SoCs) has 128 byte line
length and its tags are also managed per 128 byte line.

Signed-off-by: Masahiro Yamada <yamada.masahiro at socionext.com>
---

 include/configs/uniphier.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h
index 2606e53..9ee125f 100644
--- a/include/configs/uniphier.h
+++ b/include/configs/uniphier.h
@@ -25,7 +25,11 @@
 /* #define CONFIG_SYS_ICACHE_OFF */
 /* #define CONFIG_SYS_DCACHE_OFF */
 
+#ifdef CONFIG_CACHE_UNIPHIER
+#define CONFIG_SYS_CACHELINE_SIZE	128
+#else
 #define CONFIG_SYS_CACHELINE_SIZE	32
+#endif
 
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO
-- 
1.9.1