[U-Boot] cmd: net: flush cache cacheline aligned
Stefan Agner
stefan at agner.ch
Mon Aug 15 06:40:20 CEST 2016
On 2016-08-14 13:06, Tom Rini wrote:
> On Tue, Aug 02, 2016 at 12:20:28AM -0700, Stefan Agner wrote:
>
>> From: Stefan Agner <stefan.agner at toradex.com>
>>
>> Flush loaded data cacheline aligned. This avoids warnings such as
>> CACHE: Misaligned operation at range [81000000, 816d0fa8]
>>
>> Signed-off-by: Stefan Agner <stefan.agner at toradex.com>
>> Tested-by: Fabio Estevam <fabio.estevam at nxp.com>
>> Reviewed-by: Simon Glass <sjg at chromium.org>
>> ---
>> Why do we actually have to flush caches after load? It seems to
>> have worked so far despite the caches did not get flushed (due to
>> missalignment).
>
> Joe, would you prefer to just drop this flush, given the rest of the
> thread? Thanks!
Just found Diana Craciuns (added to CC) commit
99ffccbd3e5b7bc715e2eed6ea6d36f4020b56d8 ("Flush cache after the OS
image is loaded into the memory.") which adds a flush_cache in
cmd_bootm.c:
>--snip
Flush cache after the OS image is loaded into the memory.
Since we are loading an executable image into memory we need flush it
out of the cache to possible maintain coherence on CPUs with split
instruction and data caches. We do this for other executable image
loading command.
On PowerPC once we do this we no longer need to explicitly flush the
dcache on multi-core systems in the BOOTM_STATE_OS_PREP phase. We now
treat the BOOTM_STATE_OS_PREP as a no-op to maintain backwards
compatibility with the bootm subcommand.
<--snip
That might be actually the case in this situation too, although I feel
this should be taken care of before kernel entry. At least on ARM,
caches get flushed before jumping to the kernel. Is PowerPC different in
that matter?
--
Stefan
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