[U-Boot] [PATCH 6/6] [RFC] at91: SPL clock fix for AT91SAM9G15 based boards.

[Heiko Schocher]

on a at91sam9g15 basd board I need another MOR register
init as common for at91 based boards. Changes:

- set AT91_PMC_MOR_KEY to 0x37, without this writting has
  no effect to tthis register.
- AT91_PMC_MOR_OSCOUNT to 0
- set AT91_PMC_MOR_MOSCEN and AT91_PMC_MOR_MOSCSEL

Signed-off-by: Heiko Schocher <hs at denx.de>

---
I post this as a RFC patch, because this settings may
break other boards ... so if this is not a valid common
setting, I propose to make this setting board configurable
through a weak function ...

 arch/arm/mach-at91/spl_at91.c | 13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-at91/spl_at91.c b/arch/arm/mach-at91/spl_at91.c
index cc3341a..4d8ed26 100644
--- a/arch/arm/mach-at91/spl_at91.c
+++ b/arch/arm/mach-at91/spl_at91.c
@@ -31,13 +31,20 @@ static void enable_ext_reset(void)
 void lowlevel_clock_init(void)
 {
 	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+	u32 tmp;
 
 	if (!(readl(&pmc->sr) & AT91_PMC_MOSCS)) {
-		/* Enable Main Oscillator */
-		writel(AT91_PMC_MOSCS | (0x40 << 8), &pmc->mor);
+		tmp = readl(&pmc->mor);
+		tmp &= ~AT91_PMC_MOR_OSCOUNT(0xff);
+		tmp &= ~AT91_PMC_MOR_KEY(0xff);
+		tmp |= AT91_PMC_MOR_MOSCEN;
+		tmp |= AT91_PMC_MOR_MOSCSEL;
+		tmp |= AT91_PMC_MOR_OSCOUNT(0);
+		tmp |= AT91_PMC_MOR_KEY(0x37);
+		writel(tmp, &pmc->mor);
 
 		/* Wait until Main Oscillator is stable */
-		while (!(readl(&pmc->sr) & AT91_PMC_MOSCS))
+		while (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCS))
 			;
 	}
 
-- 
2.5.5