[U-Boot] [PATCH 4/5] arm: Provide common PSCI based reset handler

[Simon Glass]

Hi Alex,

On 16 August 2016 at 13:08, Alexander Graf <agraf at suse.de> wrote:
> Most armv8 systems have PSCI support enabled in EL3, either through
> ARM Trusted Firmware or other firmware.
>
> On these systems, we do not need to implement system reset manually,
> but can instead rely on higher level firmware to deal with it.
>
> The exclude list seems excessive right now, but NXP is working on
> providing an in-tree PSCI implementation, so that all NXP systems
> can eventually use PSCI as well.
>
> Signed-off-by: Alexander Graf <agraf at suse.de>
> ---
>  arch/arm/cpu/armv8/Kconfig   | 18 ++++++++++++++++++
>  arch/arm/cpu/armv8/fwcall.c  |  7 +++++++
>  arch/arm/mach-meson/board.c  |  5 -----
>  board/xilinx/zynqmp/zynqmp.c |  5 -----
>  4 files changed, 25 insertions(+), 10 deletions(-)

Reviewed-by: Simon Glass <sjg at chromium.org>

>
> diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig
> index 7e1fc4c..cd2d9bb 100644
> --- a/arch/arm/cpu/armv8/Kconfig
> +++ b/arch/arm/cpu/armv8/Kconfig
> @@ -21,4 +21,22 @@ config ARMV8_SPIN_TABLE
>             - Reserve the code for the spin-table and the release address
>               via a /memreserve/ region in the Device Tree.
>
> +config PSCI_RESET
> +       bool "Use PSCI for reset and shutdown"
> +       default y
> +       depends on !ARCH_EXYNOS7 && !ARCH_BCM283X && !TARGET_LS2080A_EMU && \
> +                  !TARGET_LS2080A_SIMU && !TARGET_LS2080AQDS && \
> +                  !TARGET_LS2080ARDB && !TARGET_LS1012AQDS && \
> +                  !TARGET_LS1012ARDB && !TARGET_LS1012AFRDM && \
> +                  !TARGET_LS1043ARDB && !ARCH_UNIPHIER && !ARCH_SNAPDRAGON && \
> +                  !TARGET_S32V234EVB

Will this break new systems that are added?

> +       help
> +         Most armv8 systems have PSCI support enabled in EL3, either through
> +         ARM Trusted Firmware or other firmware.
> +
> +         On these systems, we do not need to implement system reset manually,
> +         but can instead rely on higher level firmware to deal with it.
> +
> +         Select Y here to make use of PSCI calls for system reset
> +
>  endif
> diff --git a/arch/arm/cpu/armv8/fwcall.c b/arch/arm/cpu/armv8/fwcall.c
> index b3ef7c0..c57b15f 100644
> --- a/arch/arm/cpu/armv8/fwcall.c
> +++ b/arch/arm/cpu/armv8/fwcall.c
> @@ -112,3 +112,10 @@ void __noreturn psci_system_off(void)
>         while (1)
>                 ;
>  }
> +
> +#ifdef CONFIG_PSCI_RESET
> +void reset_misc(void)
> +{
> +       psci_system_reset();
> +}
> +#endif /* CONFIG_PSCI_RESET */
> diff --git a/arch/arm/mach-meson/board.c b/arch/arm/mach-meson/board.c
> index f159cbf..775872d 100644
> --- a/arch/arm/mach-meson/board.c
> +++ b/arch/arm/mach-meson/board.c
> @@ -41,11 +41,6 @@ void dram_init_banksize(void)
>         gd->bd->bi_dram[0].size = gd->ram_size - (16 * 1024 * 1024);
>  }
>
> -void reset_cpu(ulong addr)
> -{
> -       psci_system_reset();
> -}
> -
>  static struct mm_region gxbb_mem_map[] = {
>         {
>                 .virt = 0x0UL,
> diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
> index 5108b94..f15dc5d 100644
> --- a/board/xilinx/zynqmp/zynqmp.c
> +++ b/board/xilinx/zynqmp/zynqmp.c
> @@ -307,8 +307,3 @@ int board_usb_cleanup(int index, enum usb_init_type init)
>         return 0;
>  }
>  #endif
> -
> -void reset_misc(void)
> -{
> -       psci_system_reset();
> -}
> --
> 1.8.5.6
>

Regards,
Simon