[U-Boot] [PATCH 7/8] armv8: ls1046a: disable SATA ECC in DCSR

[Gong Qianyu]

From: Shaohui Xie <Shaohui.Xie at nxp.com>

So to fix SATA CRC error.

Signed-off-by: Shaohui Xie <Shaohui.Xie at nxp.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong at nxp.com>
---
 arch/arm/cpu/armv8/fsl-layerscape/soc.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index f62b78d..f1c6964 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -22,6 +22,9 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define SATA_ECC_REG_ADDR	0x20140520
+#define SATA_ECC_DISABLE	0x80000000
+
 bool soc_has_dp_ddr(void)
 {
 	struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
@@ -222,6 +225,9 @@ int sata_init(void)
 {
 	struct ccsr_ahci __iomem *ccsr_ahci = (void *)CONFIG_SYS_SATA;
 
+#ifdef CONFIG_LS1046A
+	out_le32((void *)SATA_ECC_REG_ADDR, SATA_ECC_DISABLE);
+#endif
 	out_le32(&ccsr_ahci->ppcfg, AHCI_PORT_PHY_1_CFG);
 	out_le32(&ccsr_ahci->pp2c, AHCI_PORT_PHY_2_CFG);
 	out_le32(&ccsr_ahci->pp3c, AHCI_PORT_PHY_3_CFG);
-- 
2.1.0.27.g96db324