[U-Boot] [PATCH 2/8] ddr: fsl: fix a compile issue

[Gong Qianyu]

From: Shaohui Xie <Shaohui.Xie at nxp.com>

When CONFIG_SYS_FSL_ERRATUM_A009801 is defined but
CONFIG_SYS_FSL_ERRATUM_A008511 not defined, there is compile error that
temp32 undeclared, this patch fixes it.

Signed-off-by: Shaohui Xie <Shaohui.Xie at nxp.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong at nxp.com>
---
 drivers/ddr/fsl/fsl_ddr_gen4.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/ddr/fsl/fsl_ddr_gen4.c b/drivers/ddr/fsl/fsl_ddr_gen4.c
index c2f8a8b..c0bf1a0 100644
--- a/drivers/ddr/fsl/fsl_ddr_gen4.c
+++ b/drivers/ddr/fsl/fsl_ddr_gen4.c
@@ -50,8 +50,13 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
 	u32 temp_sdram_cfg;
 	u32 total_gb_size_per_controller;
 	int timeout;
+#if defined(CONFIG_SYS_FSL_ERRATUM_A008511) || \
+	defined(CONFIG_SYS_FSL_ERRATUM_A009801)
+	u32 temp32;
+#endif
+
 #ifdef CONFIG_SYS_FSL_ERRATUM_A008511
-	u32 temp32, mr6;
+	u32 mr6;
 	u32 vref_seq1[3] = {0x80, 0x96, 0x16};	/* for range 1 */
 	u32 vref_seq2[3] = {0xc0, 0xf0, 0x70};	/* for range 2 */
 	u32 *vref_seq = vref_seq1;
-- 
2.1.0.27.g96db324