[U-Boot] [U-Boot, v5, 2/2] arm: cache: always flush cache line size for page table

Tom Rini trini at konsulko.com
Mon Aug 29 14:00:44 CEST 2016


On Sun, Aug 14, 2016 at 09:33:01PM -0700, Stefan Agner wrote:

> From: Stefan Agner <stefan.agner at toradex.com>
> 
> The page table is maintained by the CPU, hence it is safe to always
> align cache flush to a whole cache line size. This allows to use
> mmu_page_table_flush for a single page table, e.g. when configure
> only small regions through mmu_set_region_dcache_behaviour.
> 
> Signed-off-by: Stefan Agner <stefan.agner at toradex.com>
> Tested-by: Fabio Estevam <fabio.estevam at nxp.com>
> Reviewed-by: Simon Glass <sjg at chromium.org>
> Reviewed-by: Heiko Schocher <hs at denx.de>

Applied to u-boot/master, thanks!

-- 
Tom
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