[U-Boot] [PATCH v2 1/3] mx6: ddr: Adjust MDREF register settings for MX6UL

Eric Nelson eric at nelint.com
Mon Aug 29 22:40:23 CEST 2016


Hi Fabio,

On 08/29/2016 12:53 PM, Fabio Estevam wrote:
> Hi Eric,
> 
> On Mon, Aug 29, 2016 at 3:48 PM, Eric Nelson <eric at nelint.com> wrote:
> 
>> I think this commit message needs work.
>>
>> "we have" seems to mean that the NXP U-Boot fork has this
>> setting, but this isn't an explanation of why.
> 
> Would you prefer something like this in ddr.c?
> http://pastebin.com/GYBTSFkM
> 
> and then on the board file:
> 
> http://pastebin.com/cEqvUJwg
> 

I'm actually not sure because I haven't quite figured out
where the 32k and 64k clock roots are being passed into
the MMDC.

If these are configured in a way that allow the kernel
implementations to disable one of them, then this should
be a board-specific setting to allow different choices.

Or is the inability to use the 64k clock driven by the
i.MX6UL somehow? If that's the case, then your original
patch is more correct.

I'm also not sure why the NXP U-Boot is decreasing the
refresh rate on the 6UL EVK.

Regards,


Eric


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