[U-Boot] [PATCH v3 3/9] ARM: stm32: cleanup stm32f7 files
vikas
vikas.manocha at st.com
Thu Dec 1 19:18:55 CET 2016
Hi Michael,
On 11/24/2016 11:10 AM, Michael Kurz wrote:
> Cleanup stm32f7 files:
> - use BIT macro
> - use GENMASK macro
good.
> - use rcc struct instead of macro additions
Macro definitions are better than struct to make rcc compatible throughout the stm32f7 family in case of additional registers and also to reuse it for stm32f4. At present we cant use same rcc struct for stm32f4 and stm32f7 because of two additional registers in stm32f7.
So keep the macros for rcc, we would move it for both stm32f7 and stm32f4.
rcc struct shouldn't be in for stm32f7 in first place, the last patch which added it went unnoticed.
>
> Signed-off-by: Michael Kurz <michi.kurz at gmail.com>
>
> ---
>
> Changes in v3:
> - Removed 'prefix all constants with STM32_'
> - Reverted move of header into source file (rcc.h -> clock.c)
>
> Changes in v2:
> - Add cleanup patch
>
> arch/arm/include/asm/arch-stm32f7/fmc.h | 6 +-
> arch/arm/include/asm/arch-stm32f7/gpt.h | 6 +-
> arch/arm/include/asm/arch-stm32f7/rcc.h | 50 ++++++----
> arch/arm/include/asm/arch-stm32f7/stm32.h | 8 +-
> arch/arm/mach-stm32/stm32f7/clock.c | 154 ++++++++++++-----------------
> board/st/stm32f746-disco/stm32f746-disco.c | 7 +-
> 6 files changed, 107 insertions(+), 124 deletions(-)
>
> diff --git a/arch/arm/include/asm/arch-stm32f7/fmc.h b/arch/arm/include/asm/arch-stm32f7/fmc.h
> index 7dd5077..d61a86f 100644
> --- a/arch/arm/include/asm/arch-stm32f7/fmc.h
> +++ b/arch/arm/include/asm/arch-stm32f7/fmc.h
> @@ -58,12 +58,12 @@ struct stm32_fmc_regs {
> #define FMC_SDCMR_MODE_SELFREFRESH 5
> #define FMC_SDCMR_MODE_POWERDOWN 6
>
> -#define FMC_SDCMR_BANK_1 (1 << 4)
> -#define FMC_SDCMR_BANK_2 (1 << 3)
> +#define FMC_SDCMR_BANK_1 BIT(4)
> +#define FMC_SDCMR_BANK_2 BIT(3)
>
[...]
>
> struct stm32_rcc_regs {
> u32 cr; /* RCC clock control */
> @@ -95,8 +96,9 @@ struct stm32_rcc_regs {
> u32 rsv6[2];
> u32 sscgr; /* RCC spread spectrum clock generation */
> u32 plli2scfgr; /* RCC PLLI2S configuration */
> - u32 pllsaicfgr;
> - u32 dckcfgr;
> + u32 pllsaicfgr; /* PLLSAI configuration */
> + u32 dckcfgr; /* dedicated clocks configuration register */
> + u32 dckcfgr2; /* dedicated clocks configuration register */
not a cleanup as the title of the patch suggest.
> };
> #define STM32_RCC ((struct stm32_rcc_regs *)RCC_BASE)
>
> diff --git a/arch/arm/mach-stm32/stm32f7/clock.c b/arch/arm/mach-stm32/stm32f7/clock.c
> index 78d22d4..8091c74 100644
> --- a/arch/arm/mach-stm32/stm32f7/clock.c
> +++ b/arch/arm/mach-stm32/stm32f7/clock.c
> @@ -11,76 +11,50 @@
> #include <asm/arch/stm32.h>
> #include <asm/arch/stm32_periph.h>
>
> -#define RCC_CR_HSION (1 << 0)
[...]
> +#define APB_PSC_4 0x5
> +#define APB_PSC_8 0x6
> +#define APB_PSC_16 0x7
>
> #if !defined(CONFIG_STM32_HSE_HZ)
> #error "CONFIG_STM32_HSE_HZ not defined!"
> @@ -243,40 +217,40 @@ void clock_setup(int peripheral)
> {
> switch (peripheral) {
> case USART1_CLOCK_CFG:
> - setbits_le32(RCC_BASE + RCC_APB2ENR, RCC_ENR_USART1EN);
> + setbits_le32(&STM32_RCC->apb2enr, RCC_APB2ENR_USART1EN);
lets keep macro for the reason stated above.
> break;
> case GPIO_A_CLOCK_CFG:
> - setbits_le32(RCC_BASE + RCC_AHB1ENR, RCC_ENR_GPIO_A_EN);
> + setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_GPIO_A_EN);
DITTO, same for rest of the changes below.
Cheers,
Vikas
> break;
> case GPIO_B_CLOCK_CFG:
> - setbits_le32(RCC_BASE + RCC_AHB1ENR, RCC_ENR_GPIO_B_EN);
> + setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_GPIO_B_EN);
> break;
> case GPIO_C_CLOCK_CFG:
> - setbits_le32(RCC_BASE + RCC_AHB1ENR, RCC_ENR_GPIO_C_EN);
> + setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_GPIO_C_EN);
> break;
> case GPIO_D_CLOCK_CFG:
> - setbits_le32(RCC_BASE + RCC_AHB1ENR, RCC_ENR_GPIO_D_EN);
> + setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_GPIO_D_EN);
> break;
> case GPIO_E_CLOCK_CFG:
> - setbits_le32(RCC_BASE + RCC_AHB1ENR, RCC_ENR_GPIO_E_EN);
> + setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_GPIO_E_EN);
> break;
> case GPIO_F_CLOCK_CFG:
> - setbits_le32(RCC_BASE + RCC_AHB1ENR, RCC_ENR_GPIO_F_EN);
> + setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_GPIO_F_EN);
> break;
> case GPIO_G_CLOCK_CFG:
> - setbits_le32(RCC_BASE + RCC_AHB1ENR, RCC_ENR_GPIO_G_EN);
> + setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_GPIO_G_EN);
> break;
> case GPIO_H_CLOCK_CFG:
> - setbits_le32(RCC_BASE + RCC_AHB1ENR, RCC_ENR_GPIO_H_EN);
> + setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_GPIO_H_EN);
> break;
> case GPIO_I_CLOCK_CFG:
> - setbits_le32(RCC_BASE + RCC_AHB1ENR, RCC_ENR_GPIO_I_EN);
> + setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_GPIO_I_EN);
> break;
> case GPIO_J_CLOCK_CFG:
> - setbits_le32(RCC_BASE + RCC_AHB1ENR, RCC_ENR_GPIO_J_EN);
> + setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_GPIO_J_EN);
> break;
> case GPIO_K_CLOCK_CFG:
> - setbits_le32(RCC_BASE + RCC_AHB1ENR, RCC_ENR_GPIO_K_EN);
> + setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_GPIO_K_EN);
> break;
> default:
> break;
> diff --git a/board/st/stm32f746-disco/stm32f746-disco.c b/board/st/stm32f746-disco/stm32f746-disco.c
> index 404fdfa..c769da0 100644
> --- a/board/st/stm32f746-disco/stm32f746-disco.c
> +++ b/board/st/stm32f746-disco/stm32f746-disco.c
> @@ -114,11 +114,6 @@ out:
> return rv;
> }
>
> -/*
> - * STM32 RCC FMC specific definitions
> - */
> -#define RCC_ENR_FMC (1 << 0) /* FMC module clock */
> -
> static inline u32 _ns2clk(u32 ns, u32 freq)
> {
> u32 tmp = freq/1000000;
> @@ -176,7 +171,7 @@ int dram_init(void)
> if (rv)
> return rv;
>
> - setbits_le32(RCC_BASE + RCC_AHB3ENR, RCC_ENR_FMC);
> + setbits_le32(&STM32_RCC->ahb3enr, RCC_AHB3ENR_FMC_EN);
>
> /*
> * Get frequency for NS2CLK calculation.
> --
> 2.1.4
>
> .
>
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