[U-Boot] [PATCH] powerpc: Retain compatible property for L2 cache
Chris Packham
judge.packham at gmail.com
Fri Dec 2 08:35:07 CET 2016
On 2/12/2016 6:34 AM, "york sun" <york.sun at nxp.com> wrote:
>
> On 11/30/2016 11:47 PM, Chris Packham wrote:
> > On Thu, Dec 1, 2016 at 6:18 AM, york sun <york.sun at nxp.com> wrote:
> >> On 11/28/2016 07:10 PM, Chris Packham wrote:
> >>> Instead of setting the compatible property to "cache", append the
> >>> desired value retaining what may already be set in the current
property.
> >>>
> >>> Signed-off-by: Chris Packham <judge.packham at gmail.com>
> >>> ---
> >>
> >> <snip>
> >>
> >>>
> >>> arch/powerpc/cpu/mpc85xx/fdt.c | 3 ++-
> >>> 1 file changed, 2 insertions(+), 1 deletion(-)
> >>>
> >>> diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c
b/arch/powerpc/cpu/mpc85xx/fdt.c
> >>> index 047c972ac78e..f31df41836d5 100644
> >>> --- a/arch/powerpc/cpu/mpc85xx/fdt.c
> >>> +++ b/arch/powerpc/cpu/mpc85xx/fdt.c
> >>> @@ -337,7 +337,8 @@ static inline void ft_fixup_l2cache(void *blob)
> >>> fdt_setprop_cell(blob, l2_off, "cache-size",
size);
> >>> fdt_setprop_cell(blob, l2_off, "cache-sets",
num_sets);
> >>> fdt_setprop_cell(blob, l2_off, "cache-level",
2);
> >>> - fdt_setprop(blob, l2_off, "compatible",
"cache", 6);
> >>> + if (fdt_node_check_compatible(blob, l2_off,
"cache") == 1)
> >>> + fdt_appendprop_string(blob, l2_off,
"compatible", "cache");
> >>> }
> >>>
> >>> if (l3_off < 0) {
> >>>
> >>
> >> You drop fdt_setprop, check the compatible "cache" and append it with
> >> "cache" again? I thought you wanted
> >>
> >> compatible = "fsl,t2080-l2-cache-controller", "cache";
> >
> > I already have "fsl,t2080-l2-cache-controller" in my dts. Really I just
want
> >
> > fdt_appendprop_string(blob, l2_off, "compatible", "cache");
>
> I see.
>
> >
> > But the check is necessary because we run through this block multiple
> > times (once per CPU). My initial version was
> >
> > struct cpu_type *cpu = identify_cpu(SVR_SOC_VER(get_svr()));
> > int len;
> > char buf[40];
> >
> > len = sprintf(buf,
> > "fsl,%c%s-l2-cache-controller",tolower(cpu->name[0]), cpu->name + 1) +
> > 1;
> > len += sprintf(buf + len, "cache") + 1;
> >
> > fdt_setprop(blob, l2_off, "compatible", buf, len);
> >
> > But that's more code.
> >
>
> Ideally we don't have to fix up dts. Since if we have to do it, I like
> the long version better. If the dts doesn't have correct compatible, the
> kernel won't take it, right?
>
Ok. I'll post a v2 based on the long version. As it's a repeat of code in
another block I'll see if i can extract it to a helper function.
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