[U-Boot] [PATCH 04/10] arm: socfpga: arria10: Added clock manager and pin mux compat macro

[Chee, Tien Fong]

On Sel, 2016-12-06 at 13:49 +0100, Marek Vasut wrote:
> On 12/06/2016 08:52 AM, Chee Tien Fong wrote:
> > 
> > From: Tien Fong Chee <tien.fong.chee at intel.com>
> > 
> > These compat macros would be used by clock manager and pin mux
> > drivers
> > to look the required HW info from DTS for hardware initialization.
> > 
> > Signed-off-by: Tien Fong Chee <tien.fong.chee at intel.com>
> > Cc: Marek Vasut <marex at denx.de>
> > Cc: Dinh Nguyen <dinguyen at kernel.org>
> > Cc: Chin Liang See <chin.liang.see at intel.com>
> > Cc: Tien Fong <skywindctf at gmail.com>
> > ---
> >  include/fdtdec.h |    8 ++++++++
> >  lib/fdtdec.c     |    2 ++
> >  2 files changed, 10 insertions(+), 0 deletions(-)
> > 
> > diff --git a/include/fdtdec.h b/include/fdtdec.h
> > index 27887c8..68cb199 100644
> > --- a/include/fdtdec.h
> > +++ b/include/fdtdec.h
> > @@ -155,6 +155,14 @@ enum fdt_compat_id {
> >  	COMPAT_INTEL_BAYTRAIL_FSP_MDP,	/* Intel FSP memory-
> > down params */
> >  	COMPAT_INTEL_IVYBRIDGE_FSP,	/* Intel Ivy Bridge FSP
> > */
> >  	COMPAT_SUNXI_NAND,		/* SUNXI NAND controller
> > */
> > +	COMPAT_ALTERA_SOCFPGA_CLK,	/* SoCFPGA Clock
> > initialization */
> > +	COMPAT_ALTERA_SOCFPGA_PINCTRL_SINGLE,	/* pinctrl-
> > single */
> > +	COMPAT_ALTERA_SOCFPGA_H2F_BRG,		/* Arria10
> > hps2fpga bridge */
> > +	COMPAT_ALTERA_SOCFPGA_LWH2F_BRG,	/* Arria10
> > lwhps2fpga bridge */
> > +	COMPAT_ALTERA_SOCFPGA_F2H_BRG,		/* Arria10
> > fpga2hps bridge */
> > +	COMPAT_ALTERA_SOCFPGA_F2SDR0,		/* Arria10
> > fpga2SDRAM0 bridge */
> > +	COMPAT_ALTERA_SOCFPGA_F2SDR1,		/* Arria10
> > fpga2SDRAM1 bridge */
> > +	COMPAT_ALTERA_SOCFPGA_F2SDR2,		/* Arria10
> > fpga2SDRAM2 bridge */
> Is all of this needed ? You're only adding two entries in the FDTDEC
> below.
> 
This is to avoid compilation error, we have some functions ported from
our internal branch, which using above COMPAT macro. Soon, in upcoming
patches, we will need those functions and more entries will be added
into FDTDEC below.
> > 
> >  
> >  	COMPAT_COUNT,
> >  };
> > diff --git a/lib/fdtdec.c b/lib/fdtdec.c
> > index 4defb90..09a1db4 100644
> > --- a/lib/fdtdec.c
> > +++ b/lib/fdtdec.c
> > @@ -66,6 +66,8 @@ static const char * const
> > compat_names[COMPAT_COUNT] = {
> >  	COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
> >  	COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
> >  	COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
> > +	COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
> > +	COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
> >  };
> >  
> >  const char *fdtdec_get_compatible(enum fdt_compat_id id)
> > 
>