[U-Boot] [PATCH v3] arm: am33xx: Initialize EMIF REG_PR_OLD_COUNT for BBB and am335x-evm

[Tom Rini]

On Fri, Dec 09, 2016 at 12:29:13PM +0200, Jyri Sarha wrote:

> Initialize EMIF OCP_CONFIG registers REG_COS_COUNT_1, REG_COS_COUNT_2,
> and REG_PR_OLD_COUNT field for Beaglebone-Black and am335x-evm. With
> the default values LCDC suffers from DMA FIFO underflows and frame
> synchronization lost errors. The initialization values are the highest
> that work flawlessly when heavy memory load is generated by CPU. 32bpp
> colors were used in the test. On BBB the video mode used 110MHz pixel
> clock. The mode supported by the panel of am335x-evm uses 30MHz pixel
> clock.
> 
> Signed-off-by: Jyri Sarha <jsarha at ti.com>

Thanks again!

Reviewed-by: Tom Rini <trini at konsulko.com>

-- 
Tom
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