[U-Boot] [PATCH 02/10] arm: socfpga: arria10: Added config option build for SPL

Marek Vasut marex at denx.de
Fri Dec 9 14:02:37 CET 2016


On 12/09/2016 10:46 AM, Chee, Tien Fong wrote:
> On Rab, 2016-12-07 at 14:54 +0100, Marek Vasut wrote:
>> On 12/07/2016 11:57 AM, Chee, Tien Fong wrote:
>>>
>>> On Sel, 2016-12-06 at 13:47 +0100, Marek Vasut wrote:
>>>>
>>>> On 12/06/2016 08:52 AM, Chee Tien Fong wrote:
>>>>>
>>>>>
>>>>> From: Tien Fong Chee <tien.fong.chee at intel.com>
>>>>>
>>>>> These changes to ensure Arria10 SPL build success.
>>>> Please reword the commit message, mention you're removing the
>>>> Arria10
>>>> bits. Still, this does not even apply on mainline, on top of what
>>>> does
>>>> this apply ?
>>>>
>>> I disabled some features temporary, so SPL build can pass and print
>>> out
>>> working. I will enable these features back in upcoming patches.
>>> This is
>>> base on 01-arria10 branch.
>> But this patch seems to only enable stuff ... ?
>>
> Enable the spl. Disable SPI flash temporary, for preventing build
> failed, but this will be enabled back with upcoming patches for
> supporting SPI flash.

What's the problem with SPI flash ? I thought it's the same block as in
C/A 5 ?


-- 
Best regards,
Marek Vasut


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