[U-Boot] [PATCH 1/3] arm64: mvebu: Add L3 cache flush functionality to A8K family

Stefan Roese sr at denx.de
Mon Dec 12 11:40:08 CET 2016


On 04.12.2016 17:34, kostap at marvell.com wrote:
> From: Konstantin Porotchkin <kostap at marvell.com>
>
> Add missing L3 cache flush functionality which absence prevents
> Linux kernel from normal boot in case the L3 cache is enabled
> by ATF.
> The L3 cache is named the "last level" cache in order to keep
> the terminology similar to the ATF code.
> This cache should not be disabled by u-boot since the Linux
> kernel cannot activate it, so it is activates at ATF stage.
> However the cache flush is required for preventing data corruption
> after disabling the MMU and the data cache before passing control
> to the loaded Linux image.
>
> Signed-off-by: Konstantin Porotchkin <kostap at marvell.com>
> Cc: Stefan Roese <sr at denx.de>
> Cc: Nadav Haklai <nadavh at marvell.com>
> Cc: Neta Zur Hershkovits <neta at marvell.com>
> Cc: Omri Itach <omrii at marvell.com>
> Cc: Igal Liberman <igall at marvell.com>
> Cc: Haim Boot <hayim at marvell.com>
> Cc: Hanna Hawa <hannah at marvell.com>

Patchset applied to u-boot-marvell/master.

Thanks,
Stefan


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