[U-Boot] [PATCH] armv8/fsl_lsch2: Add the OCRAM initialization

[Zhiqiang Hou]

From: Hou Zhiqiang <Zhiqiang.Hou at nxp.com>

Clear the content to zero and the ECC error bit of OCRAM1/2.

The OCRAM must be initialized to ZERO by the unit of 8-Byte before
accessing it, or else it will generate ECC error. And the IBR has
accessed the OCRAM before this initialization, so the ECC error
status bit should to be cleared.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou at nxp.com>
Signed-off-by: Pratiyush Srivastava <pratiyush.srivastava at nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha at nxp.com>
---
 arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S      | 37 +++++++++++++++++++++++
 arch/arm/include/asm/arch-fsl-layerscape/config.h |  3 ++
 2 files changed, 40 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
index e5916ee..d74e749 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
+++ b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
@@ -245,10 +245,47 @@ ENTRY(lowlevel_init)
 	isb
 #endif
 
+#if defined(CONFIG_FSL_LSCH2) && !defined(CONFIG_SPL_BUILD)
+	bl	fsl_ocram_init
+#endif
+
 	mov	lr, x29			/* Restore LR */
 	ret
 ENDPROC(lowlevel_init)
 
+#if defined(CONFIG_FSL_LSCH2) && !defined(CONFIG_SPL_BUILD)
+ENTRY(fsl_ocram_init)
+	mov	x28, lr			/* Save LR */
+	bl	fsl_clear_ocram
+	bl	fsl_ocram_clear_ecc_err
+	mov	lr, x28			/* Restore LR */
+	ret
+ENDPROC(fsl_ocram_init)
+
+ENTRY(fsl_clear_ocram)
+/* Clear OCRAM */
+	ldr	x0, =CONFIG_SYS_FSL_OCRAM_BASE
+	ldr	x1, =(CONFIG_SYS_FSL_OCRAM_BASE + CONFIG_SYS_FSL_OCRAM_SIZE)
+	mov	x2, #0
+clear_loop:
+	str	x2, [x0]
+	add	x0, x0, #8
+	cmp	x0, x1
+	b.lo	clear_loop
+	ret
+ENDPROC(fsl_clear_ocram)
+
+ENTRY(fsl_ocram_clear_ecc_err)
+	/* OCRAM1/2 ECC status bit */
+	mov	w1, #0x60
+	ldr	x0, =DCSR_DCFG_SBEESR2
+	str	w1, [x0]
+	ldr	x0, =DCSR_DCFG_MBEESR2
+	str	w1, [x0]
+	ret
+ENDPROC(fsl_ocram_init)
+#endif
+
 #ifdef CONFIG_FSL_LSCH3
 hnf_pstate_poll:
 	/* x0 has the desired status, return 0 for success, 1 for timeout
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index ce6233d..021dd19 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -164,6 +164,9 @@
 #define CONFIG_SYS_FSL_OCRAM_SIZE		0x00200000 /* 2M */
 #define CONFIG_SYS_CCSRBAR_DEFAULT		0x01000000
 
+#define DCSR_DCFG_SBEESR2			0x20140534
+#define DCSR_DCFG_MBEESR2			0x20140544
+
 #define CONFIG_SYS_FSL_CCSR_SCFG_BE
 #define CONFIG_SYS_FSL_ESDHC_BE
 #define CONFIG_SYS_FSL_WDOG_BE
-- 
2.1.0.27.g96db324