[U-Boot] [PATCH 2/3] udoo_neo: Add PFUZE300 PMIC support
Stefano Babic
sbabic at denx.de
Fri Dec 16 10:23:50 CET 2016
On 06/12/2016 18:38, Breno Lima wrote:
> UDOO Neo boards has a PFUZE300 connected to I2C1 bus.
>
> Tested on a UDOO Neo Full with "pmic PFUZE3000 dump" command.
>
> Signed-off-by: Breno Lima <breno.lima at nxp.com>
> ---
> board/udoo/neo/neo.c | 143 +++++++++++++++++++++++++++++++++++++++++++++
> include/configs/udoo_neo.h | 13 +++++
> 2 files changed, 156 insertions(+)
>
> diff --git a/board/udoo/neo/neo.c b/board/udoo/neo/neo.c
> index cfeed6f..ad7452c 100644
> --- a/board/udoo/neo/neo.c
> +++ b/board/udoo/neo/neo.c
> @@ -19,10 +19,14 @@
> #include <fsl_esdhc.h>
> #include <asm/arch/crm_regs.h>
> #include <asm/io.h>
> +#include <asm/imx-common/mxc_i2c.h>
> #include <asm/arch/sys_proto.h>
> #include <spl.h>
> #include <linux/sizes.h>
> #include <common.h>
> +#include <i2c.h>
> +#include <power/pmic.h>
> +#include <power/pfuze3000_pmic.h>
>
> DECLARE_GLOBAL_DATA_PTR;
>
> @@ -41,6 +45,11 @@ enum {
> PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \
> PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
>
> +#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
> + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
> + PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
> + PAD_CTL_ODE)
> +
> #define WDOG_PAD_CTRL (PAD_CTL_PUE | PAD_CTL_PKE | PAD_CTL_SPEED_MED | \
> PAD_CTL_DSE_40ohm)
>
> @@ -56,6 +65,136 @@ int dram_init(void)
> return 0;
> }
>
> +#ifdef CONFIG_SYS_I2C_MXC
> +#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
> +/* I2C1 for PMIC */
> +static struct i2c_pads_info i2c_pad_info1 = {
> + .scl = {
> + .i2c_mode = MX6_PAD_GPIO1_IO00__I2C1_SCL | PC,
> + .gpio_mode = MX6_PAD_GPIO1_IO00__GPIO1_IO_0 | PC,
> + .gp = IMX_GPIO_NR(1, 0),
> + },
> + .sda = {
> + .i2c_mode = MX6_PAD_GPIO1_IO01__I2C1_SDA | PC,
> + .gpio_mode = MX6_PAD_GPIO1_IO01__GPIO1_IO_1 | PC,
> + .gp = IMX_GPIO_NR(1, 1),
> + },
> +};
> +#endif
> +
> +#ifdef CONFIG_POWER
> +int power_init_board(void)
> +{
> + struct pmic *p;
> + int ret;
> + unsigned int reg, rev_id;
> +
> + ret = power_pfuze3000_init(PFUZE3000_I2C_BUS);
> + if (ret)
> + return ret;
> +
> + p = pmic_get("PFUZE3000");
> + ret = pmic_probe(p);
> + if (ret)
> + return ret;
> +
> + pmic_reg_read(p, PFUZE3000_DEVICEID, ®);
> + pmic_reg_read(p, PFUZE3000_REVID, &rev_id);
> + printf("PMIC: PFUZE3000 DEV_ID=0x%x REV_ID=0x%x\n", reg, rev_id);
> +
> + /* disable Low Power Mode during standby mode */
> + pmic_reg_read(p, PFUZE3000_LDOGCTL, ®);
> + reg |= 0x1;
> + ret = pmic_reg_write(p, PFUZE3000_LDOGCTL, reg);
> + if (ret)
> + return ret;
> +
> + ret = pmic_reg_write(p, PFUZE3000_SW1AMODE, 0xc);
> + if (ret)
> + return ret;
> +
> + ret = pmic_reg_write(p, PFUZE3000_SW1BMODE, 0xc);
> + if (ret)
> + return ret;
> +
> + ret = pmic_reg_write(p, PFUZE3000_SW2MODE, 0xc);
> + if (ret)
> + return ret;
> +
> + ret = pmic_reg_write(p, PFUZE3000_SW3MODE, 0xc);
> + if (ret)
> + return ret;
> +
> + /* set SW1A standby voltage 0.975V */
> + pmic_reg_read(p, PFUZE3000_SW1ASTBY, ®);
> + reg &= ~0x3f;
> + reg |= PFUZE3000_SW1AB_SETP(9750);
> + ret = pmic_reg_write(p, PFUZE3000_SW1ASTBY, reg);
> + if (ret)
> + return ret;
> +
> + /* set SW1B standby voltage 0.975V */
> + pmic_reg_read(p, PFUZE3000_SW1BSTBY, ®);
> + reg &= ~0x3f;
> + reg |= PFUZE3000_SW1AB_SETP(9750);
> + ret = pmic_reg_write(p, PFUZE3000_SW1BSTBY, reg);
> + if (ret)
> + return ret;
> +
> + /* set SW1A/VDD_ARM_IN step ramp up time from 16us to 4us/25mV */
> + pmic_reg_read(p, PFUZE3000_SW1ACONF, ®);
> + reg &= ~0xc0;
> + reg |= 0x40;
> + ret = pmic_reg_write(p, PFUZE3000_SW1ACONF, reg);
> + if (ret)
> + return ret;
> +
> + /* set SW1B/VDD_SOC_IN step ramp up time from 16us to 4us/25mV */
> + pmic_reg_read(p, PFUZE3000_SW1BCONF, ®);
> + reg &= ~0xc0;
> + reg |= 0x40;
> + ret = pmic_reg_write(p, PFUZE3000_SW1BCONF, reg);
> + if (ret)
> + return ret;
> +
> + /* set VDD_ARM_IN to 1.350V */
> + pmic_reg_read(p, PFUZE3000_SW1AVOLT, ®);
> + reg &= ~0x3f;
> + reg |= PFUZE3000_SW1AB_SETP(13500);
> + ret = pmic_reg_write(p, PFUZE3000_SW1AVOLT, reg);
> + if (ret)
> + return ret;
> +
> + /* set VDD_SOC_IN to 1.350V */
> + pmic_reg_read(p, PFUZE3000_SW1BVOLT, ®);
> + reg &= ~0x3f;
> + reg |= PFUZE3000_SW1AB_SETP(13500);
> + ret = pmic_reg_write(p, PFUZE3000_SW1BVOLT, reg);
> + if (ret)
> + return ret;
> +
> + /* set DDR_1_5V to 1.350V */
> + pmic_reg_read(p, PFUZE3000_SW3VOLT, ®);
> + reg &= ~0x0f;
> + reg |= PFUZE3000_SW3_SETP(13500);
> + ret = pmic_reg_write(p, PFUZE3000_SW3VOLT, reg);
> + if (ret)
> + return ret;
> +
> + /* set VGEN2_1V5 to 1.5V */
> + pmic_reg_read(p, PFUZE3000_VLDO2CTL, ®);
> + reg &= ~0x0f;
> + reg |= PFUZE3000_VLDO_SETP(15000);
> + /* enable */
> + reg |= 0x10;
> + ret = pmic_reg_write(p, PFUZE3000_VLDO2CTL, reg);
> + if (ret)
> + return ret;
> +
> + return 0;
> +}
> +#endif
> +
> static iomux_v3_cfg_t const uart1_pads[] = {
> MX6_PAD_GPIO1_IO04__UART1_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
> MX6_PAD_GPIO1_IO05__UART1_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
> @@ -115,6 +254,10 @@ int board_init(void)
> /* Active high for ncp692 */
> gpio_direction_output(IMX_GPIO_NR(4, 16) , 1);
>
> + #ifdef CONFIG_SYS_I2C_MXC
> + setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
> + #endif
> +
> return 0;
> }
>
> diff --git a/include/configs/udoo_neo.h b/include/configs/udoo_neo.h
> index 0357631..0c59068 100644
> --- a/include/configs/udoo_neo.h
> +++ b/include/configs/udoo_neo.h
> @@ -90,4 +90,17 @@
>
> #define CONFIG_IMX_THERMAL
>
> +/* I2C configs */
> +#define CONFIG_SYS_I2C
> +#define CONFIG_SYS_I2C_MXC
> +#define CONFIG_SYS_I2C_MXC_I2C1
> +#define CONFIG_SYS_I2C_SPEED 100000
> +
> +/* PMIC */
> +#define CONFIG_POWER
> +#define CONFIG_POWER_I2C
> +#define CONFIG_POWER_PFUZE3000
> +#define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
> +#define PFUZE3000_I2C_BUS 0
> +
> #endif /* __CONFIG_H */
>
Applied to u-boot-imx, thanks !
Best regards,
Stefano Babic
--
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