[U-Boot] [PATCH 09/18] mxc_ocotp: Update driver to support OCOTP controller on i.MX7ULP

[Peng Fan]

From: Ye Li <ye.li at nxp.com>

Update the mxc_ocotp driver to support i.MX7ULP. The read/write sequence
has some changes due to PDN and OUT_STATUS registers added and TIME register is
removed. Also update the bank size and number.

Signed-off-by: Peng Fan <peng.fan at nxp.com>
Signed-off-by: Ye Li <ye.li at nxp.com>
Cc: Stefano Babic <sbabic at denx.de>
---
 drivers/misc/mxc_ocotp.c | 50 ++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 50 insertions(+)

diff --git a/drivers/misc/mxc_ocotp.c b/drivers/misc/mxc_ocotp.c
index 0b1c050..7761778 100644
--- a/drivers/misc/mxc_ocotp.c
+++ b/drivers/misc/mxc_ocotp.c
@@ -29,6 +29,12 @@
 #ifdef CONFIG_MX7
 #define BM_CTRL_ADDR                    0x0000000f
 #define BM_CTRL_RELOAD                  0x00000400
+#elif defined(CONFIG_MX7ULP)
+#define BM_CTRL_ADDR                    0x000000FF
+#define BM_CTRL_RELOAD                  0x00000400
+#define BM_OUT_STATUS_DED				0x00000400
+#define BM_OUT_STATUS_LOCKED			0x00000800
+#define BM_OUT_STATUS_PROGFAIL			0x00001000
 #else
 #define BM_CTRL_ADDR			0x0000007f
 #endif
@@ -70,6 +76,9 @@
 #elif defined CONFIG_MX7
 #define FUSE_BANK_SIZE	0x40
 #define FUSE_BANKS	16
+#elif defined(CONFIG_MX7ULP)
+#define FUSE_BANK_SIZE	0x80
+#define FUSE_BANKS	31
 #else
 #error "Unsupported architecture\n"
 #endif
@@ -187,6 +196,10 @@ static int finish_access(struct ocotp_regs *regs, const char *caller)
 	err = !!(readl(&regs->ctrl) & BM_CTRL_ERROR);
 	clear_error(regs);
 
+#ifdef CONFIG_MX7ULP
+	/* Need to power down the OTP memory */
+	writel(1, &regs->pdn);
+#endif
 	if (err) {
 		printf("mxc_ocotp %s(): Access protect error\n", caller);
 		return -EIO;
@@ -217,6 +230,13 @@ int fuse_read(u32 bank, u32 word, u32 *val)
 
 	*val = readl(&regs->bank[phy_bank].fuse_regs[phy_word << 2]);
 
+#ifdef CONFIG_MX7ULP
+	if (readl(&regs->out_status) & BM_OUT_STATUS_DED) {
+		writel(BM_OUT_STATUS_DED, &regs->out_status_clr);
+		printf("mxc_ocotp %s(): fuse read wrong\n", __func__);
+		return -EIO;
+	}
+#endif
 	return finish_access(regs, __func__);
 }
 
@@ -238,6 +258,12 @@ static void set_timing(struct ocotp_regs *regs)
 	clrsetbits_le32(&regs->timing, BM_TIMING_FSOURCE | BM_TIMING_PROG,
 			timing);
 }
+#elif defined(CONFIG_MX7ULP)
+static void set_timing(struct ocotp_regs *regs)
+{
+	/* No timing set for MX7ULP */
+}
+
 #else
 static void set_timing(struct ocotp_regs *regs)
 {
@@ -302,6 +328,14 @@ int fuse_sense(u32 bank, u32 word, u32 *val)
 	*val = readl(&regs->read_fuse_data);
 #endif
 
+#ifdef CONFIG_MX7ULP
+	if (readl(&regs->out_status) & BM_OUT_STATUS_DED) {
+		writel(BM_OUT_STATUS_DED, &regs->out_status_clr);
+		printf("mxc_ocotp %s(): fuse read wrong\n", __func__);
+		return -EIO;
+	}
+#endif
+
 	return finish_access(regs, __func__);
 }
 
@@ -355,6 +389,14 @@ int fuse_prog(u32 bank, u32 word, u32 val)
 #endif
 	udelay(WRITE_POSTAMBLE_US);
 
+#ifdef CONFIG_MX7ULP
+	if (readl(&regs->out_status) & (BM_OUT_STATUS_PROGFAIL | BM_OUT_STATUS_LOCKED)) {
+		writel((BM_OUT_STATUS_PROGFAIL | BM_OUT_STATUS_LOCKED), &regs->out_status_clr);
+		printf("mxc_ocotp %s(): fuse write is failed\n", __func__);
+		return -EIO;
+	}
+#endif
+
 	return finish_access(regs, __func__);
 }
 
@@ -374,5 +416,13 @@ int fuse_override(u32 bank, u32 word, u32 val)
 
 	writel(val, &regs->bank[phy_bank].fuse_regs[phy_word << 2]);
 
+#ifdef CONFIG_MX7ULP
+	if (readl(&regs->out_status) & (BM_OUT_STATUS_PROGFAIL | BM_OUT_STATUS_LOCKED)) {
+		writel((BM_OUT_STATUS_PROGFAIL | BM_OUT_STATUS_LOCKED), &regs->out_status_clr);
+		printf("mxc_ocotp %s(): fuse write is failed\n", __func__);
+		return -EIO;
+	}
+#endif
+
 	return finish_access(regs, __func__);
 }
-- 
2.6.2