[U-Boot] [PATCH v2 21/30] arm: socfpga: arria10: Enhanced socfpga_arria10_defconfig to support SPL

[Chee Tien Fong]

From: Tien Fong Chee <tien.fong.chee at intel.com>

Enhanced defconfig file for Arria10 to enable SPL build and supporting
device tree build for SDMMC.

Signed-off-by: Tien Fong Chee <tien.fong.chee at intel.com>
Cc: Marek Vasut <marex at denx.de>
Cc: Dinh Nguyen <dinguyen at kernel.org>
Cc: Chin Liang See <chin.liang.see at intel.com>
Cc: Tien Fong <skywindctf at gmail.com>
---
Changes for V2
- Removed boot header info setup since it already fixed in mainline
---
 configs/socfpga_arria10_defconfig | 18 +++++++++++++-----
 1 file changed, 13 insertions(+), 5 deletions(-)

diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig
index 422261b..755bb66 100644
--- a/configs/socfpga_arria10_defconfig
+++ b/configs/socfpga_arria10_defconfig
@@ -3,14 +3,22 @@ CONFIG_ARCH_SOCFPGA=y
 CONFIG_TARGET_SOCFPGA_ARRIA10=y
 CONFIG_DM_GPIO=y
 CONFIG_TARGET_SOCFPGA_ARRIA10_SOCDK=y
-CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_socdk"
+CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_socdk_sdmmc"
+CONFIG_IDENT_STRING="socfpga_arria10"
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
 CONFIG_DWAPB_GPIO=y
-CONFIG_DM_ETH=y
-CONFIG_ETH_DESIGNWARE=y
 CONFIG_SYS_NS16550=y
-CONFIG_CADENCE_QSPI=y
-CONFIG_DESIGNWARE_SPI=y
 CONFIG_DM_MMC=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_CMD_MMC=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_SIMPLE_BUS=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_OF_LIBFDT=y
+CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
-- 
2.2.2