[U-Boot] [PATCH 19/23] x86: tnc: Use DM PCI API in disable_igd()
Bin Meng
bmeng.cn at gmail.com
Mon Feb 1 10:40:54 CET 2016
Once we get udevice of IGD and SDVO, we can use its udevice to
access PCI configuration space with dm_pci_write_config32().
Signed-off-by: Bin Meng <bmeng.cn at gmail.com>
---
arch/x86/cpu/queensbay/tnc.c | 22 +++++++++++++++++++---
1 file changed, 19 insertions(+), 3 deletions(-)
diff --git a/arch/x86/cpu/queensbay/tnc.c b/arch/x86/cpu/queensbay/tnc.c
index 8b79505..38082c4 100644
--- a/arch/x86/cpu/queensbay/tnc.c
+++ b/arch/x86/cpu/queensbay/tnc.c
@@ -5,9 +5,10 @@
*/
#include <common.h>
+#include <dm.h>
+#include <pci.h>
#include <asm/io.h>
#include <asm/irq.h>
-#include <asm/pci.h>
#include <asm/post.h>
#include <asm/arch/device.h>
#include <asm/arch/tnc.h>
@@ -16,6 +17,21 @@
static int __maybe_unused disable_igd(void)
{
+ struct udevice *igd, *sdvo;
+ int ret;
+
+ ret = dm_pci_bus_find_bdf(TNC_IGD, &igd);
+ if (ret)
+ return ret;
+ if (!igd)
+ return 0;
+
+ ret = dm_pci_bus_find_bdf(TNC_SDVO, &sdvo);
+ if (ret)
+ return ret;
+ if (!sdvo)
+ return 0;
+
/*
* According to Atom E6xx datasheet, setting VGA Disable (bit17)
* of Graphics Controller register (offset 0x50) prevents IGD
@@ -34,8 +50,8 @@ static int __maybe_unused disable_igd(void)
* two devices will be completely disabled (invisible in the PCI
* configuration space) unless a system reset is performed.
*/
- x86_pci_write_config32(TNC_IGD, IGD_FD, FUNC_DISABLE);
- x86_pci_write_config32(TNC_SDVO, IGD_FD, FUNC_DISABLE);
+ dm_pci_write_config32(igd, IGD_FD, FUNC_DISABLE);
+ dm_pci_write_config32(sdvo, IGD_FD, FUNC_DISABLE);
return 0;
}
--
1.8.2.1
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