[U-Boot] [PATCH v2] armv8/ls1043a: Implement workaround for erratum A009660

[york sun]

On 01/31/2016 11:16 PM, Mingkai Hu wrote:
> From: Mingkai Hu <mingkai.hu at nxp.com>
> 
> Memory controller performance is not optimal with default internal
> target queue register value, write required value for optimal DDR
> performance.
> 
> Signed-off-by: Mingkai Hu <mingkai.hu at nxp.com>
> ---
> v2: 
>  - Add a check to make sure A009660 and A008514 is are not both enabled.
>  - Add comment for the offset of eddrtqcr1.
> 
>  arch/arm/cpu/armv8/fsl-layerscape/soc.c           | 15 +++++++++++++++
>  arch/arm/include/asm/arch-fsl-layerscape/config.h |  5 +++++
>  2 files changed, 20 insertions(+)
> 
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> index 7ff0148..8b01fd2 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> @@ -213,6 +213,20 @@ static void erratum_a009929(void)
>  #endif
>  }
>  
> +/*
> + * This erratum requires setting a value to eddrtqcr1 to optimal
> + * the DDR performance. The eddrtqcr1 register is in SCFG space
> + * of LS1043A and the offset is 0x157_020c.
> + */
> +static void erratum_a009660(void)
> +{
> +#if defined(CONFIG_SYS_FSL_ERRATUM_A009660) \
> +	&& !defined(CONFIG_SYS_FSL_ERRATUM_A008514)
> +	u32 *eddrtqcr1 = (void *)CONFIG_SYS_FSL_SCFG_ADDR + 0x20c;
> +	out_be32(eddrtqcr1, 0x63b20042);
> +#endif
> +}
> +
>  void fsl_lsch2_early_init_f(void)
>  {
>  	struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
> @@ -238,6 +252,7 @@ void fsl_lsch2_early_init_f(void)
>  
>  	/* Erratum */
>  	erratum_a009929();
> +	erratum_a009660();
>  }
>  #endif
>  
> diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h
> index f1b164f..854ed0b 100644
> --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
> +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
> @@ -171,6 +171,11 @@
>  
>  #define CONFIG_SYS_FSL_ERRATUM_A009663
>  #define CONFIG_SYS_FSL_ERRATUM_A009929
> +#define CONFIG_SYS_FSL_ERRATUM_A009660
> +#if defined(CONFIG_SYS_FSL_ERRATUM_A009660) \
> +	&& defined(CONFIG_SYS_FSL_ERRATUM_A008514)
> +#error "A009660 and A008514 are both enabed for LS1043A, please check it."
> +#endif
>  #else
>  #error SoC not defined
>  #endif
> 

This is a wrong location to check macros. It should be in soc.c. The point is to
avoid errors in future/customer boards, where two macros might be both enabled
by mistake.

York