[U-Boot] [PATCH 1/5] mips: cache: Bulletproof the code against cornercases

Marek Vasut marex at denx.de
Mon Feb 1 22:45:58 CET 2016


On Monday, February 01, 2016 at 10:40:26 PM, Daniel Schwierzeck wrote:
> 2016-02-01 22:31 GMT+01:00 Marek Vasut <marex at denx.de>:
> > On Monday, February 01, 2016 at 10:29:51 PM, Daniel Schwierzeck wrote:
> >> 2016-01-27 3:13 GMT+01:00 Marek Vasut <marex at denx.de>:
> >> > This patch makes sure that the flush/invalidate_dcache_range()
> >> > functions can handle corner-case calls like this --
> >> > invalidate_dcache_range(0, 0, 0); This call is valid and is happily
> >> > produced by USB EHCI code for example. The expected behavior of the
> >> > cache function(s) in this case is that they will do no operation,
> >> > since the size is zero.
> >> > 
> >> > The current implementation though has a problem where such invocation
> >> > will result in a hard CPU hang. This is because under such conditions,
> >> > where the start_addr = 0 and stop = 0, the addr = 0 and aend =
> >> > 0xffffffe0 . The loop will then try to iterate over the entire address
> >> > space, which in itself is wrong. But iterating over the entire address
> >> > space might also hit some odd address which will cause bus hang. The
> >> > later happens on the Atheros MIPS.
> >> > 
> >> > Signed-off-by: Marek Vasut <marex at denx.de>
> >> > Cc: Daniel Schwierzeck <daniel.schwierzeck at gmail.com>
> >> > Cc: Hans de Goede <hdegoede at redhat.com>
> >> > ---
> >> > 
> >> >  arch/mips/lib/cache.c | 8 ++++++++
> >> >  1 file changed, 8 insertions(+)
> >> 
> >> applied to u-boot-mips, thanks
> > 
> > Thanks! I'll pick the remaining four, ok ?
> 
> fine with me. I don't want to break USB ;)

;-)

Best regards,
Marek Vasut


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