[U-Boot] [PATCH v2] board: atmel: sama5d2_xplained: add SPL support
Andreas Bießmann
andreas.devel at googlemail.com
Tue Feb 2 09:20:36 CET 2016
On 01.02.2016 11:18, Wenyou Yang wrote:
> The sama5d2 Xplained SPL supports the boot medias: spi flash
> and SD Card.
>
> Signed-off-by: Wenyou Yang <wenyou.yang at atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel at googlemail.com>
> ---
> This patch is base on [U-Boot] [PATCH v3 0/3] arm: at91/spl: add DDR3-SDRAM initialization support
> http://lists.denx.de/pipermail/u-boot/2016-February/244228.html
>
> Changes in v2:
> - adapt to ddr3_init() declaration variation.
>
> arch/arm/mach-at91/Kconfig | 1 +
> arch/arm/mach-at91/Makefile | 1 +
> arch/arm/mach-at91/include/mach/sama5d2.h | 32 +++++++
> board/atmel/sama5d2_xplained/sama5d2_xplained.c | 103 +++++++++++++++++++++++
> configs/sama5d2_xplained_mmc_defconfig | 1 +
> configs/sama5d2_xplained_spiflash_defconfig | 1 +
> include/configs/sama5d2_xplained.h | 39 +++++++++
> 7 files changed, 178 insertions(+)
>
> diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
> index c333647..9426302b 100644
> --- a/arch/arm/mach-at91/Kconfig
> +++ b/arch/arm/mach-at91/Kconfig
> @@ -74,6 +74,7 @@ config TARGET_AT91SAM9X5EK
> config TARGET_SAMA5D2_XPLAINED
> bool "SAMA5D2 Xplained board"
> select CPU_V7
> + select SUPPORT_SPL
>
> config TARGET_SAMA5D3_XPLAINED
> bool "SAMA5D3 Xplained board"
> diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
> index 5b89617..abd1d13 100644
> --- a/arch/arm/mach-at91/Makefile
> +++ b/arch/arm/mach-at91/Makefile
> @@ -9,6 +9,7 @@ obj-$(CONFIG_AT91SAM9G20) += sdram.o spl_at91.o
> obj-$(CONFIG_AT91SAM9M10G45) += mpddrc.o spl_at91.o
> obj-$(CONFIG_AT91SAM9N12) += mpddrc.o spl_at91.o
> obj-$(CONFIG_AT91SAM9X5) += mpddrc.o spl_at91.o
> +obj-$(CONFIG_SAMA5D2) += mpddrc.o spl_atmel.o matrix.o atmel_sfr.o
> obj-$(CONFIG_SAMA5D3) += mpddrc.o spl_atmel.o
> obj-$(CONFIG_SAMA5D4) += mpddrc.o spl_atmel.o matrix.o atmel_sfr.o
> obj-y += spl.o
> diff --git a/arch/arm/mach-at91/include/mach/sama5d2.h b/arch/arm/mach-at91/include/mach/sama5d2.h
> index c85571c..dd5a2a7 100644
> --- a/arch/arm/mach-at91/include/mach/sama5d2.h
> +++ b/arch/arm/mach-at91/include/mach/sama5d2.h
> @@ -106,6 +106,7 @@
> #define ATMEL_BASE_MPDDRC 0xf000c000
> #define ATMEL_BASE_XDMAC0 0xf0010000
> #define ATMEL_BASE_PMC 0xf0014000
> +#define ATMEL_BASE_MATRIX0 0xf0018000
> #define ATMEL_BASE_QSPI0 0xf0020000
> #define ATMEL_BASE_QSPI1 0xf0024000
> #define ATMEL_BASE_SPI0 0xf8000000
> @@ -117,6 +118,7 @@
> #define ATMEL_BASE_UART1 0xf8020000
> #define ATMEL_BASE_UART2 0xf8024000
> #define ATMEL_BASE_TWI0 0xf8028000
> +#define ATMEL_BASE_SFR 0xf8030000
> #define ATMEL_BASE_SYSC 0xf8048000
> #define ATMEL_BASE_SPI1 0xfc000000
> #define ATMEL_BASE_UART3 0xfc008000
> @@ -125,6 +127,7 @@
> #define ATMEL_BASE_UDPHS 0xfc02c000
>
> #define ATMEL_BASE_PIOA 0xfc038000
> +#define ATMEL_BASE_MATRIX1 0xfc03c000
>
> #define ATMEL_CHIPID_CIDR 0xfc069000
> #define ATMEL_CHIPID_EXID 0xfc069004
> @@ -171,6 +174,35 @@
> #define CPU_HAS_PCR
> #define CPU_HAS_H32MXDIV
>
> +/* AICREDIR Unlock Key */
> +#define ATMEL_SFR_AICREDIR_KEY 0xB6D81C4D
> +
> +/* MATRIX0(H64MX) slave id definitions */
> +#define H64MX_SLAVE_AXIMX_BRIDGE 0 /* Bridge from H64MX to AXIMX */
> +#define H64MX_SLAVE_PERIPH_BRIDGE 1 /* H64MX Peripheral Bridge */
> +#define H64MX_SLAVE_DDRC_PORT0 2 /* DDR2 Port0-AESOTF */
> +#define H64MX_SLAVE_DDRC_PORT1 3 /* DDR2 Port1 */
> +#define H64MX_SLAVE_DDRC_PORT2 4 /* DDR2 Port2 */
> +#define H64MX_SLAVE_DDRC_PORT3 5 /* DDR2 Port3 */
> +#define H64MX_SLAVE_DDRC_PORT4 6 /* DDR2 Port4 */
> +#define H64MX_SLAVE_DDRC_PORT5 7 /* DDR2 Port5 */
> +#define H64MX_SLAVE_DDRC_PORT6 8 /* DDR2 Port6 */
> +#define H64MX_SLAVE_DDRC_PORT7 9 /* DDR2 Port7 */
> +#define H64MX_SLAVE_SRAM 10 /* Internal SRAM 128K */
> +#define H64MX_SLAVE_CACHE_L2 11 /* Internal SRAM 128K(L2) */
> +#define H64MX_SLAVE_QSPI0 12 /* QSPI0 */
> +#define H64MX_SLAVE_QSPI1 13 /* QSPI1 */
> +#define H64MX_SLAVE_AESB 14 /* AESB */
> +
> +/* MATRIX1(H32MX) slave id definitions */
> +#define H32MX_SLAVE_H64MX_BRIDGE 0 /* Bridge from H32MX to H64MX */
> +#define H32MX_SLAVE_PERIPH_BRIDGE0 1 /* H32MX Peripheral Bridge 0 */
> +#define H32MX_SLAVE_PERIPH_BRIDGE1 2 /* H32MX Peripheral Bridge 1 */
> +#define H32MX_SLAVE_EBI 3 /* External Bus Interface */
> +#define H32MX_SLAVE_NFC_CMD 3 /* NFC command Register */
> +#define H32MX_SLAVE_NFC_SRAM 4 /* NFC SRAM */
> +#define H32MX_SLAVE_USB 5 /* USB Device & Host */
> +
> /* SAMA5D2 series chip id definitions */
> #define ARCH_ID_SAMA5D2 0x8a5c08c0
> #define ARCH_EXID_SAMA5D21CU 0x0000005a
> diff --git a/board/atmel/sama5d2_xplained/sama5d2_xplained.c b/board/atmel/sama5d2_xplained/sama5d2_xplained.c
> index 0b3397f..8ed01dd 100644
> --- a/board/atmel/sama5d2_xplained/sama5d2_xplained.c
> +++ b/board/atmel/sama5d2_xplained/sama5d2_xplained.c
> @@ -17,6 +17,7 @@
> #include <asm/arch/at91_common.h>
> #include <asm/arch/at91_pmc.h>
> #include <asm/arch/atmel_pio4.h>
> +#include <asm/arch/atmel_mpddrc.h>
> #include <asm/arch/atmel_usba_udc.h>
> #include <asm/arch/atmel_sdhci.h>
> #include <asm/arch/clk.h>
> @@ -281,3 +282,105 @@ int board_eth_init(bd_t *bis)
>
> return rc;
> }
> +
> +/* SPL */
> +#ifdef CONFIG_SPL_BUILD
> +void spl_board_init(void)
> +{
> +#ifdef CONFIG_SYS_USE_SERIALFLASH
> + board_spi0_hw_init();
> +#endif
> +#ifdef CONFIG_ATMEL_SDHCI
> +#ifdef CONFIG_ATMEL_SDHCI0
> + board_sdhci0_hw_init();
> +#endif
> +#ifdef CONFIG_ATMEL_SDHCI1
> + board_sdhci1_hw_init();
> +#endif
> +#endif
> +}
> +
> +static void ddrc_conf(struct atmel_mpddrc_config *ddrc)
> +{
> + ddrc->md = (ATMEL_MPDDRC_MD_DBW_32_BITS | ATMEL_MPDDRC_MD_DDR3_SDRAM);
> +
> + ddrc->cr = (ATMEL_MPDDRC_CR_NC_COL_10 |
> + ATMEL_MPDDRC_CR_NR_ROW_14 |
> + ATMEL_MPDDRC_CR_CAS_DDR_CAS5 |
> + ATMEL_MPDDRC_CR_DIC_DS |
> + ATMEL_MPDDRC_CR_DIS_DLL |
> + ATMEL_MPDDRC_CR_NB_8BANKS |
> + ATMEL_MPDDRC_CR_DECOD_INTERLEAVED |
> + ATMEL_MPDDRC_CR_UNAL_SUPPORTED);
> +
> + ddrc->rtr = 0x511;
> +
> + ddrc->tpr0 = (6 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET |
> + 3 << ATMEL_MPDDRC_TPR0_TRCD_OFFSET |
> + 4 << ATMEL_MPDDRC_TPR0_TWR_OFFSET |
> + 9 << ATMEL_MPDDRC_TPR0_TRC_OFFSET |
> + 3 << ATMEL_MPDDRC_TPR0_TRP_OFFSET |
> + 4 << ATMEL_MPDDRC_TPR0_TRRD_OFFSET |
> + 4 << ATMEL_MPDDRC_TPR0_TWTR_OFFSET |
> + 4 << ATMEL_MPDDRC_TPR0_TMRD_OFFSET);
> +
> + ddrc->tpr1 = (27 << ATMEL_MPDDRC_TPR1_TRFC_OFFSET |
> + 29 << ATMEL_MPDDRC_TPR1_TXSNR_OFFSET |
> + 0 << ATMEL_MPDDRC_TPR1_TXSRD_OFFSET |
> + 3 << ATMEL_MPDDRC_TPR1_TXP_OFFSET);
> +
> + ddrc->tpr2 = (0 << ATMEL_MPDDRC_TPR2_TXARD_OFFSET |
> + 0 << ATMEL_MPDDRC_TPR2_TXARDS_OFFSET |
> + 0 << ATMEL_MPDDRC_TPR2_TRPA_OFFSET |
> + 4 << ATMEL_MPDDRC_TPR2_TRTP_OFFSET |
> + 7 << ATMEL_MPDDRC_TPR2_TFAW_OFFSET);
> +}
> +
> +void mem_init(void)
> +{
> + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
> + struct atmel_mpddr *mpddrc = (struct atmel_mpddr *)ATMEL_BASE_MPDDRC;
> + struct atmel_mpddrc_config ddrc_config;
> + u32 reg;
> +
> + ddrc_conf(&ddrc_config);
> +
> + at91_periph_clk_enable(ATMEL_ID_MPDDRC);
> + writel(AT91_PMC_DDR, &pmc->scer);
> +
> + reg = readl(&mpddrc->io_calibr);
> + reg &= ~ATMEL_MPDDRC_IO_CALIBR_RDIV;
> + reg |= ATMEL_MPDDRC_IO_CALIBR_DDR3_RZQ_55;
> + reg &= ~ATMEL_MPDDRC_IO_CALIBR_TZQIO;
> + reg |= ATMEL_MPDDRC_IO_CALIBR_TZQIO_(100);
> + writel(reg, &mpddrc->io_calibr);
> +
> + writel(ATMEL_MPDDRC_RD_DATA_PATH_SHIFT_TWO_CYCLE,
> + &mpddrc->rd_data_path);
> +
> + ddr3_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddrc_config);
> +
> + writel(0x3, &mpddrc->cal_mr4);
> + writel(64, &mpddrc->tim_cal);
> +}
> +
> +void at91_pmc_init(void)
> +{
> + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
> + u32 tmp;
> +
> + tmp = AT91_PMC_PLLAR_29 |
> + AT91_PMC_PLLXR_PLLCOUNT(0x3f) |
> + AT91_PMC_PLLXR_MUL(82) |
> + AT91_PMC_PLLXR_DIV(1);
> + at91_plla_init(tmp);
> +
> + writel(0x0 << 8, &pmc->pllicpr);
> +
> + tmp = AT91_PMC_MCKR_H32MXDIV |
> + AT91_PMC_MCKR_PLLADIV_2 |
> + AT91_PMC_MCKR_MDIV_3 |
> + AT91_PMC_MCKR_CSS_PLLA;
> + at91_mck_init(tmp);
> +}
> +#endif
> diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig
> index c1dcbef..75b1713 100644
> --- a/configs/sama5d2_xplained_mmc_defconfig
> +++ b/configs/sama5d2_xplained_mmc_defconfig
> @@ -1,6 +1,7 @@
> CONFIG_ARM=y
> CONFIG_ARCH_AT91=y
> CONFIG_TARGET_SAMA5D2_XPLAINED=y
> +CONFIG_SPL=y
> CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_MMC"
> # CONFIG_CMD_IMI is not set
> # CONFIG_CMD_IMLS is not set
> diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig
> index 0271e8e..6d61a7e 100644
> --- a/configs/sama5d2_xplained_spiflash_defconfig
> +++ b/configs/sama5d2_xplained_spiflash_defconfig
> @@ -1,6 +1,7 @@
> CONFIG_ARM=y
> CONFIG_ARCH_AT91=y
> CONFIG_TARGET_SAMA5D2_XPLAINED=y
> +CONFIG_SPL=y
> CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_SERIALFLASH"
> # CONFIG_CMD_IMI is not set
> # CONFIG_CMD_IMLS is not set
> diff --git a/include/configs/sama5d2_xplained.h b/include/configs/sama5d2_xplained.h
> index ae5ba3d..272257e 100644
> --- a/include/configs/sama5d2_xplained.h
> +++ b/include/configs/sama5d2_xplained.h
> @@ -25,8 +25,12 @@
> #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
> #define CONFIG_SYS_SDRAM_SIZE 0x20000000
>
> +#ifdef CONFIG_SPL_BUILD
> +#define CONFIG_SYS_INIT_SP_ADDR 0x210000
> +#else
> #define CONFIG_SYS_INIT_SP_ADDR \
> (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
> +#endif
>
> #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
>
> @@ -119,4 +123,39 @@
>
> #endif
>
> +/* SPL */
> +#define CONFIG_SPL_FRAMEWORK
> +#define CONFIG_SPL_TEXT_BASE 0x200000
> +#define CONFIG_SPL_MAX_SIZE 0x10000
> +#define CONFIG_SPL_BSS_START_ADDR 0x20000000
> +#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
> +#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
> +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
> +
> +#define CONFIG_SPL_LIBCOMMON_SUPPORT
> +#define CONFIG_SPL_LIBGENERIC_SUPPORT
> +#define CONFIG_SPL_GPIO_SUPPORT
> +#define CONFIG_SPL_SERIAL_SUPPORT
> +
> +#define CONFIG_SPL_BOARD_INIT
> +#define CONFIG_SYS_MONITOR_LEN (512 << 10)
> +
> +#ifdef CONFIG_SYS_USE_MMC
> +#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/armv7/u-boot-spl.lds
> +#define CONFIG_SPL_MMC_SUPPORT
> +#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400
> +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
> +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
> +#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
> +#define CONFIG_SPL_FAT_SUPPORT
> +#define CONFIG_SPL_LIBDISK_SUPPORT
> +
> +#elif CONFIG_SYS_USE_SERIALFLASH
> +#define CONFIG_SPL_SPI_SUPPORT
> +#define CONFIG_SPL_SPI_FLASH_SUPPORT
> +#define CONFIG_SPL_SPI_LOAD
> +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000
> +
> +#endif
> +
> #endif
>
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