[U-Boot] [PATCH] armv8/ls2080ardb: Enable VID support

[york sun]

Rai,

On 02/04/2016 06:25 AM, Rai Harninder wrote:
> The fuse status register provides the values from on-chip
> voltage ID efuses programmed at the factory. These values
> define the voltage requirements for the chip. u-boot reads
> FUSESR and translates the values into the appropriate
> commands to set the voltage output value of an external
> voltage regulator.

No need to repeat what VID feature is. Instead, please focus on what this patch
does.

> 
> Signed-off-by: Rai Harninder <harninder.rai at nxp.com>
> ---
>  .../include/asm/arch-fsl-layerscape/immap_lsch3.h  |    4 ++++
>  board/freescale/common/vid.c                       |   15 ++++++++++++++-
>  board/freescale/ls2080ardb/ls2080ardb.c            |    5 +++++
>  include/configs/ls2080ardb.h                       |   16 ++++++++++++++++
>  4 files changed, 39 insertions(+), 1 deletions(-)
> 
> diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
> index 91f3ce8..4fd58ee 100644
> --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
> +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
> @@ -146,6 +146,10 @@ struct ccsr_gur {
>  	u8	res_008[0x20-0x8];
>  	u32	gpporcr1;	/* General-purpose POR configuration */
>  	u32	gpporcr2;	/* General-purpose POR configuration 2 */
> +#define FSL_CHASSIS3_DCFG_FUSESR_VID_SHIFT	25
> +#define FSL_CHASSIS3_DCFG_FUSESR_VID_MASK	0x1F
> +#define FSL_CHASSIS3_DCFG_FUSESR_ALTVID_SHIFT	20
> +#define FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK	0x1F
>  	u32	dcfg_fusesr;	/* Fuse status register */
>  	u32	gpporcr3;
>  	u32	gpporcr4;
> diff --git a/board/freescale/common/vid.c b/board/freescale/common/vid.c
> index 1bd65a8..16ae177 100644
> --- a/board/freescale/common/vid.c
> +++ b/board/freescale/common/vid.c
> @@ -10,6 +10,8 @@
>  #include <asm/io.h>
>  #ifdef CONFIG_LS1043A
>  #include <asm/arch/immap_lsch2.h>
> +#elif defined(CONFIG_FSL_LAYERSCAPE)
> +#include <asm/arch/immap_lsch3.h>

It is not appropriate to use macro CONFIG_FSL_LAYERSCAPE here. It is defined for
both LS1043 and LS2080.

>  #else
>  #include <asm/immap_85xx.h>
>  #endif
> @@ -285,7 +287,7 @@ static int set_voltage(int i2caddress, int vdd)
>  int adjust_vdd(ulong vdd_override)
>  {
>  	int re_enable = disable_interrupts();
> -#ifdef CONFIG_LS1043A
> +#if defined(CONFIG_LS1043A) || defined(CONFIG_FSL_LAYERSCAPE)
>  	struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
>  #else

Same here.


>  	ccsr_gur_t __iomem *gur =
> @@ -362,7 +364,11 @@ int adjust_vdd(ulong vdd_override)
>  	}
>  
>  	/* get the voltage ID from fuse status register */
> +#ifdef CONFIG_FSL_LAYERSCAPE
> +	fusesr = in_le32(&gur->dcfg_fusesr);
> +#else
>  	fusesr = in_be32(&gur->dcfg_fusesr);
> +#endif

Are you sure you are not breaking LS1043 here?

>  	/*
>  	 * VID is used according to the table below
>  	 *                ---------------------------------------
> @@ -387,6 +393,13 @@ int adjust_vdd(ulong vdd_override)
>  		vid = (fusesr >> FSL_CHASSIS2_DCFG_FUSESR_VID_SHIFT) &
>  			FSL_CHASSIS2_DCFG_FUSESR_VID_MASK;
>  	}
> +#elif defined(CONFIG_FSL_LAYERSCAPE)
> +	vid = (fusesr >> FSL_CHASSIS3_DCFG_FUSESR_ALTVID_SHIFT) &
> +		FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK;
> +	if ((vid == 0) || (vid == FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK)) {
> +		vid = (fusesr >> FSL_CHASSIS3_DCFG_FUSESR_VID_SHIFT) &
> +			FSL_CHASSIS3_DCFG_FUSESR_VID_MASK;
> +	}

and here?

>  #else
>  	vid = (fusesr >> FSL_CORENET_DCFG_FUSESR_ALTVID_SHIFT) &
>  		FSL_CORENET_DCFG_FUSESR_ALTVID_MASK;
> diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c
> index c63b639..9515b25 100644
> --- a/board/freescale/ls2080ardb/ls2080ardb.c
> +++ b/board/freescale/ls2080ardb/ls2080ardb.c
> @@ -122,6 +122,11 @@ int select_i2c_ch_pca9547(u8 ch)
>  	return 0;
>  }
>  
> +int i2c_multiplexer_select_vid_channel(u8 channel)
> +{
> +	return select_i2c_ch_pca9547(channel);
> +}
> +
>  int config_board_mux(int ctrl_type)
>  {
>  	u8 reg5;
> diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h
> index 116dbcd..9a95f31 100644
> --- a/include/configs/ls2080ardb.h
> +++ b/include/configs/ls2080ardb.h
> @@ -14,6 +14,22 @@
>  
>  #define CONFIG_DISPLAY_BOARDINFO
>  
> +#define I2C_MUX_CH_VOL_MONITOR		0xa
> +#define I2C_VOL_MONITOR_ADDR		0x38
> +#define CONFIG_VOL_MONITOR_IR36021_READ
> +#define CONFIG_VOL_MONITOR_IR36021_SET
> +
> +#define CONFIG_VID_FLS_ENV		"ls2080ardb_vdd_mv"
> +#ifndef CONFIG_SPL_BUILD
> +#define CONFIG_VID
> +#endif
> +/* step the IR regulator in 5mV increments */
> +#define IR_VDD_STEP_DOWN		5
> +#define IR_VDD_STEP_UP			5
> +/* The lowest and highest voltage allowed for LS2080ARDB */
> +#define VDD_MV_MIN			819
> +#define VDD_MV_MAX			1212
> +
>  #ifndef __ASSEMBLY__
>  unsigned long get_board_sys_clk(void);
>  #endif
> 

While you debug this feature on RDB board, please take a look at QDS as well.

York