[U-Boot] Newbie SPL question for socfpga_sockit

Phil Reid preid at electromag.com.au
Thu Feb 18 03:45:45 CET 2016


G'day George

On 18/02/2016 5:54 AM, George Broz wrote:
> Hello,
>
> Sorry for the newbie question...
>
> I have an Altera/Terasic board (socfpga_sockit) that has issues recognizing
> USB storage devices (roughly 60% good / 40% bad):
>
> SOCFPGA_CYCLONE5 # usb start
> (Re)start USB...
> USB0: scanning bus 0 for devices... DW_USB: Transfer completion
> interrupt timeout
> Timed out waiting for channel to disable
> 1 USB Device(s) found
> scanning usb for storage devices... 0 Storage Device(s) found
>
>
> The pre-made U-Boot SPL & image that come with the board have version:
> U-Boot 2013.01.01 (Aug 08 2014 - 10:46:23)
>
> (Old!)
>
> I need to rebuild U-Boot for this board to add md5sum and hopefully fix the
> USB issues. When I've rebuilt the u-boot.img from the 2013.01.01 branch
> of the (Altera maintained) source, U-boot boots, but the USB problems
> get worse (100% bad):
>
> USB0: Core Release: 2.93a
> dwc_otg_core_host_init: Unable to clear halt on channel 1 (timeout
> HCCHAR 0xC0000000 @ffb40520)
> dwc_otg_core_host_init: Unable to clear halt on channel 2 (timeout
> HCCHAR 0xC0000000 @ffb40540
>
> (I've confirmed that CONFIG_CMD_USB and CONFIG_USB_STORAGE are
> defined and have tried turning on and off 'dcache' as suggested elsewhere
> to no avail).
>
> If I try a later release (e.g. v2016.01 which seems to support the Terasic
> board explicitly) the boot process stops just after loading the SPL.
>
> At this point I have only been changing the u-boot.img component, not the
> SPL (in the a2 partition of the MMC).
>
> The documentation from Altera about generating the SPL seems to require
> using Qsys/Quartus tools which I'd really like to avoid.
>
> I can produce u-boot-spl.bin / u-boot.img from
> make socfpga_sockit_defconfig; make all.
>
> My newbie question ... should be I able to use directly the u-boot-spl.bin
> generated by the build to replace the SPL on the board?
>
> (I'm hoping the USB issues resolve themselves when I'm able to get
> the later version of U-Boot running...)
>

I've just gone thru the process (this week) of getting uboot 2016.01 to boot on our custom socfpga board.
There where a few issues in getting things going.
If your using the sd card to boot then the current memory layout is not per the altera documentation.
I had to make the changes below to config to match the altera docs. Otherwise it hangs just after the SPL.
You also need to use the -dtb image versions with 2016.01 for things to work.
Again you may need to make sure the uboot device trees match your hardware.
Not all uboot drivers appear to be using the DT as yet.

Note the SPL is tightly coupled to the board design and potentially the FPGA image.
If you using bridges or routing HPS resources (eg i2c etc) to the fpga the SPL configures the muxes.

There's a script in uboot src at arch\arm\mach-socfpga\qts-filter.sh
That will generate the qts files for you arch.

I haven't tried the USB stuff as yet.
There are some issues witht eh altera USB port trigger an Over Current event on device insertation.
They've modified the linux kenerl driver to use external OV current detection to get around the problem.
My intial workaround was to insert USB device prior to power on.
I haven't looked at the uboot USB driver yet to see what's in there.


-- 
Regards
Phil Reid


diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index a09e906..3a1b59b 100644 (file)
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -357,13 +357,13 @@ unsigned int cm_get_qspi_controller_clk_hz(void);

/* SPL SDMMC boot support */
#ifdef CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SPL_LIBDISK_SUPPORT
#if defined(CONFIG_SPL_FAT_SUPPORT) || defined(CONFIG_SPL_EXT_SUPPORT)
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 2
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.img"
-#define CONFIG_SPL_LIBDISK_SUPPORT
#else
-#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 3
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0xa00 /* offset 2560 sect (1M+256k) */
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 3
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */
#endif
#endif




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