[U-Boot] [RFC] armv8: layerscape: Add support of u-boot device tree fix-up

[Prabhakar Kushwaha]

There is a requirement of u-boot dts fix-up before it is being
consumed by u-boot.

NXP's SoC LS2085A, LS2080A and LS2088A are almost same except variation
in ARM core where LS2085A/LS2080A has A57 and LS2088A has A72.
These SoCs will be placed on common LS2085ARDB platform.

So instead of maintaining defferent device tree per SoC, fix-up dts
before being used by u-boot.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha at nxp.com>
---
 arch/arm/cpu/armv8/fsl-layerscape/fdt.c        | 53 ++++++++++++++++++++++++++
 arch/arm/include/asm/arch-fsl-layerscape/soc.h |  4 ++
 include/common.h                               |  2 +
 include/configs/ls2080a_common.h               |  1 +
 lib/fdtdec.c                                   | 10 +++++
 5 files changed, 70 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
index 4e4861d..cbdeef3 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
@@ -5,11 +5,13 @@
  */
 
 #include <common.h>
+#include <asm/io.h>
 #include <libfdt.h>
 #include <fdt_support.h>
 #include <phy.h>
 #ifdef CONFIG_FSL_LSCH3
 #include <asm/arch/fdt.h>
+#include <asm/arch/soc.h>
 #endif
 #ifdef CONFIG_FSL_ESDHC
 #include <fsl_esdhc.h>
@@ -18,6 +20,8 @@
 #include <asm/arch/mp.h>
 #endif
 
+DECLARE_GLOBAL_DATA_PTR;
+
 int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc)
 {
 	return fdt_setprop_string(blob, offset, "phy-connection-type",
@@ -205,3 +209,52 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 	fdt_fixup_smmu(blob);
 #endif
 }
+
+void ft_early_fixup_cpu(void *blob)
+{
+	int off;
+	u32 svr, ver;
+	struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
+
+	off = fdt_path_offset(blob, "/cpus");
+	if (off < 0) {
+		puts("couldn't find /cpus node\n");
+		return;
+	}
+
+	off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
+	svr = gur_in32(&gur->svr);
+	ver = SVR_SOC_VER(svr);
+
+	while (off != -FDT_ERR_NOTFOUND) {
+		switch(ver) {
+		case SVR_LS2080:
+		case SVR_LS2085:
+		case SVR_LS2045:
+		case SVR_LS2040:
+			fdt_setprop_string(blob, off, "compatible",
+					   "arm,cortex-a57");
+			break;
+		case SVR_LS2088:
+		case SVR_LS2048:
+		case SVR_LS2084:
+		case SVR_LS2028:
+			fdt_setprop_string(blob, off, "compatible",
+					   "arm,cortex-a72");
+			break;
+		}
+
+		off = fdt_node_offset_by_prop_value(blob, off, "device_type",
+						    "cpu", 4);
+	}
+}
+
+void ft_early_cpu_setup(void **blob)
+{
+	fdt_move(*blob, (void *)CONFIG_SYS_DTS_ADDR, fdt_totalsize(blob));
+
+	*blob = (void *)CONFIG_SYS_DTS_ADDR;
+
+	ft_early_fixup_cpu((void *) *blob);
+
+}
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
index ea78e15..a6cff40 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
@@ -46,6 +46,10 @@ struct cpu_type {
 #define SVR_LS2080		0x870110
 #define SVR_LS2085		0x870100
 #define SVR_LS2040		0x870130
+#define SVR_LS2088		0x870901
+#define SVR_LS2048		0x870921
+#define SVR_LS2084		0x870911
+#define SVR_LS2028		0x870922
 
 #define SVR_MAJ(svr)		(((svr) >> 4) & 0xf)
 #define SVR_MIN(svr)		(((svr) >> 0) & 0xf)
diff --git a/include/common.h b/include/common.h
index 1563d64..6dc8a7f 100644
--- a/include/common.h
+++ b/include/common.h
@@ -603,6 +603,8 @@ void ft_pci_setup(void *blob, bd_t *bd);
 #endif
 #endif
 
+void ft_early_cpu_setup(void **);
+
 void smp_set_core_boot_addr(unsigned long addr, int corenr);
 void smp_kick_all_cpus(void);
 
diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h
index def0a6f..aa5ace9 100644
--- a/include/configs/ls2080a_common.h
+++ b/include/configs/ls2080a_common.h
@@ -24,6 +24,7 @@
 
 /* Link Definitions */
 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
+#define CONFIG_SYS_DTS_ADDR		(CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
 
 /* We need architecture specific misc initializations */
 #define CONFIG_ARCH_MISC_INIT
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 1b1ca02..fc200cf 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -76,6 +76,14 @@ static const char * const compat_names[COMPAT_COUNT] = {
 	COMPAT(COMPAT_INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
 };
 
+void __ft_early_cpu_setup(void **blob)
+{
+	return;
+}
+void ft_early_cpu_setup(void **blob)
+	__attribute__((weak, alias("__ft_early_cpu_setup")));
+
+
 const char *fdtdec_get_compatible(enum fdt_compat_id id)
 {
 	/* We allow reading of the 'unknown' ID for testing purposes */
@@ -605,6 +613,8 @@ int fdtdec_prepare_fdt(void)
 #endif
 		return -1;
 	}
+
+	ft_early_cpu_setup((void *)&gd->fdt_blob);
 	return 0;
 }
 
-- 
1.9.1