[U-Boot] [PATCH 7/7] pci/layerscape: set LUT and msi-map for discovered PCI devices
Stuart Yoder
stuart.yoder at nxp.com
Mon Feb 22 16:25:49 CET 2016
From: Stuart Yoder <stuart.yoder at nxp.com>
for all PCI devices discovered in a system:
-allocate a LUT (look-up-table) entry in that PCI controller
-allocate a stream ID for the device
-program and enable a LUT entry (maps PCI requester id to stream ID)
-set the msi-map property on the controller reflecting the
LUT mapping
basic bus scanning loop/logic was taken from drivers/pci/pci.c
pci_hose_scan_bus().
Signed-off-by: Stuart Yoder <stuart.yoder at nxp.com>
---
drivers/pci/pcie_layerscape.c | 68 +++++++++++++++++++++++++++++++++++++++++
1 file changed, 68 insertions(+)
diff --git a/drivers/pci/pcie_layerscape.c b/drivers/pci/pcie_layerscape.c
index dfafaf2..eaac9e1 100644
--- a/drivers/pci/pcie_layerscape.c
+++ b/drivers/pci/pcie_layerscape.c
@@ -569,6 +569,70 @@ static void fdt_pcie_set_msi_map_entry(void *blob, struct ls_pcie *pcie,
fdt_appendprop_u32(blob, nodeoffset, "msi-map", 1);
}
+static void fdt_fixup_pcie(void *blob)
+{
+ unsigned int found_multi = 0;
+ unsigned char header_type;
+ int index;
+ u32 streamid;
+ pci_dev_t dev;
+ int bus;
+ unsigned short id;
+ struct pci_controller *hose;
+ struct ls_pcie *pcie;
+ int i;
+
+ for (i = 0, hose = pci_get_hose_head(); hose; hose = hose->next, i++) {
+ pcie = hose->priv_data;
+ for (bus = hose->first_busno; bus <= hose->last_busno; bus++) {
+
+ for (dev = PCI_BDF(bus, 0, 0);
+ dev < PCI_BDF(bus, PCI_MAX_PCI_DEVICES - 1,
+ PCI_MAX_PCI_FUNCTIONS - 1);
+ dev += PCI_BDF(0, 0, 1)) {
+
+ /* skip the host bridge */
+ if (dev == PCI_BDF(0, 0, 0))
+ continue;
+
+ if (PCI_FUNC(dev) && !found_multi)
+ continue;
+
+ pci_read_config_word(dev, PCI_VENDOR_ID, &id);
+
+ pci_read_config_byte(dev, PCI_HEADER_TYPE,
+ &header_type);
+
+ if ((id == 0xFFFF) || (id == 0x0000))
+ continue;
+
+ if (!PCI_FUNC(dev))
+ found_multi = header_type & 0x80;
+
+ streamid = ls_pcie_next_streamid();
+ if (streamid < 0) {
+ printf("ERROR: no stream ids free\n");
+ continue;
+ }
+
+ index = ls_pcie_next_lut_index(pcie);
+ if (index < 0) {
+ printf("ERROR: no LUT indexes free\n");
+ continue;
+ }
+
+ /* map PCI b.d.f to streamID in LUT */
+ ls_pcie_lut_set_mapping(pcie, index, dev >> 8,
+ streamid);
+
+ /* update msi-map in device tree */
+ fdt_pcie_set_msi_map_entry(blob, pcie, dev >> 8,
+ streamid);
+ }
+ }
+ }
+}
+
int ls_pcie_init_ctrl(int busno, enum srds_prtcl dev, struct ls_pcie_info *info)
{
struct ls_pcie *pcie;
@@ -745,6 +809,10 @@ void ft_pci_setup(void *blob, bd_t *bd)
#ifdef CONFIG_PCIE4
ft_pcie_ls_setup(blob, FSL_PCIE_COMPAT, CONFIG_SYS_PCIE4_ADDR, PCIE4);
#endif
+
+ #if defined(CONFIG_LS2080A) || defined(CONFIG_LS2085A)
+ fdt_fixup_pcie(blob);
+ #endif
}
#else
--
1.7.9.5
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