[U-Boot] [PATCH v4 00/11] arm64: Unify MMU code v3

[Alexander Graf]

Howdy,

Currently on arm64 there is a big pile of mess when it comes to MMU
support and page tables. Each board does its own little thing and the
generic code is pretty dumb and nobody actually uses it.

This patch set tries to clean that up. After this series is applied,
all boards except for the FSL Layerscape ones are converted to the
new generic page table logic and have icache+dcache enabled.

The new code always uses 4k page size. It dynamically allocates 1G or
2M pages for ranges that fit. When a dcache attribute request comes in
that requires a smaller granularity than our previous allocation could
fulfill, pages get automatically split.

I have tested and verified the code works on HiKey (bare metal),
vexpress64 (Foundation Model) and zynqmp (QEMU). The TX1 target is
untested, but given the simplicity of the maps I doubt it'll break.
ThunderX in theory should also work, but I haven't tested it. I would
be very happy if people with access to those system could give the patch
set a try.

With this we're a big step closer to a good base line for EFI payload
support, since we can now just require that all boards always have dcache
enabled.

I would also be incredibly happy if some Freescale people could look
at their MMU code and try to unify it into the now cleaned up generic
code. I don't think we're far off here.


Alex

v1 -> v2:

  - Fix comment for create_table()
  - Rework page table size calculation
  - Move mmu tables into board files
  - New patch: thunderx: Move mmu table into board file

v2 -> v3:

  - Move PGTABLE_SIZE out of the ASSEMBLY section
  - Run pte splitting code in separate page table
  - Replace is_level in count_required_pts with more obvious pte_type
  - New patch: arm64: Disable TTBR1 maps in EL1

v3 -> v4:

  - Fix Lv3 PTEs that are always of type PTE_TYPE_LEVEL (fixes zynqmp)

Alexander Graf (11):
  thunderx: Calculate TCR dynamically
  arm64: Disable TTBR1 maps in EL1
  arm64: Make full va map code more dynamic
  thunderx: Move mmu table into board file
  zymqmp: Replace home grown mmu code with generic table approach
  tegra: Replace home grown mmu code with generic table approach
  vexpress64: Add MMU tables
  dwmmc: Increase retry timeout
  hikey: Add MMU tables
  arm64: Remove non-full-va map code
  arm64: Only allow dcache disabled in SPL builds

 arch/arm/cpu/armv8/cache.S                     |  54 +++
 arch/arm/cpu/armv8/cache_v8.c                  | 551 +++++++++++++++++++------
 arch/arm/cpu/armv8/fsl-layerscape/cpu.c        |  37 +-
 arch/arm/cpu/armv8/zynqmp/cpu.c                | 217 +++-------
 arch/arm/include/asm/arch-fsl-layerscape/cpu.h |  94 ++---
 arch/arm/include/asm/armv8/mmu.h               | 123 ++----
 arch/arm/include/asm/global_data.h             |   7 +-
 arch/arm/include/asm/system.h                  |  12 +-
 arch/arm/mach-tegra/arm64-mmu.c                | 132 +-----
 board/armltd/vexpress64/vexpress64.c           |  21 +
 board/cavium/thunderx/thunderx.c               |  24 ++
 board/hisilicon/hikey/hikey.c                  |  21 +
 doc/README.arm64                               |  20 -
 drivers/mmc/dw_mmc.c                           |   2 +-
 include/configs/hikey.h                        |   4 +-
 include/configs/thunderx_88xx.h                |  30 --
 include/configs/vexpress_aemv8a.h              |   5 +-
 17 files changed, 738 insertions(+), 616 deletions(-)

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1.8.5.6