[U-Boot] [Patch v2 3/4] armv8: fsl_lsch2: Add serdes 2 support

Qianyu Gong qianyu.gong at nxp.com
Fri Jul 1 13:10:20 CEST 2016


Sorry...this should be put before the second patch.
I'll fix it in the next version.

Regards,
Qianyu

> -----Original Message-----
> From: Gong Qianyu [mailto:Qianyu.Gong at nxp.com]
> Sent: Friday, July 01, 2016 6:49 PM
> To: york sun <york.sun at nxp.com>; Prabhakar Kushwaha
> <prabhakar.kushwaha at nxp.com>; u-boot at lists.denx.de
> Cc: Mingkai Hu <mingkai.hu at nxp.com>; Zhiqiang Hou <zhiqiang.hou at nxp.com>;
> Shaohui Xie <shaohui.xie at nxp.com>; Wenbin Song <wenbin.song at nxp.com>;
> Qianyu Gong <qianyu.gong at nxp.com>
> Subject: [Patch v2 3/4] armv8: fsl_lsch2: Add serdes 2 support
> 
> This patch adds serdes 2 support for FSL_LSCH2.
> 
> Signed-off-by: Gong Qianyu <Qianyu.Gong at nxp.com>
> ---
> v2:
>  - New patch.
> 
>  arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c  | 19
> +++++++++++++++++++  arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h |
> 1 +  .../arm/include/asm/arch-fsl-layerscape/immap_lsch2.h |  2 ++
>  3 files changed, 22 insertions(+)
> 
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c
> b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c
> index fe3444a..f73092a 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c
> @@ -13,6 +13,9 @@
>  #ifdef CONFIG_SYS_FSL_SRDS_1
>  static u8 serdes1_prtcl_map[SERDES_PRCTL_COUNT];
>  #endif
> +#ifdef CONFIG_SYS_FSL_SRDS_2
> +static u8 serdes2_prtcl_map[SERDES_PRCTL_COUNT];
> +#endif
> 
>  int is_serdes_configured(enum srds_prtcl device)  { @@ -21,6 +24,9 @@ int
> is_serdes_configured(enum srds_prtcl device)  #ifdef CONFIG_SYS_FSL_SRDS_1
>  	ret |= serdes1_prtcl_map[device];
>  #endif
> +#ifdef CONFIG_SYS_FSL_SRDS_2
> +	ret |= serdes2_prtcl_map[device];
> +#endif
> 
>  	return !!ret;
>  }
> @@ -38,6 +44,12 @@ int serdes_get_first_lane(u32 sd, enum srds_prtcl device)
>  		cfg >>= FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT;
>  		break;
>  #endif
> +#ifdef CONFIG_SYS_FSL_SRDS_2
> +	case FSL_SRDS_2:
> +		cfg &= FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK;
> +		cfg >>= FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_SHIFT;
> +		break;
> +#endif
>  	default:
>  		printf("invalid SerDes%d\n", sd);
>  		break;
> @@ -114,4 +126,11 @@ void fsl_serdes_init(void)
>  		    FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT,
>  		    serdes1_prtcl_map);
>  #endif
> +#ifdef CONFIG_SYS_FSL_SRDS_2
> +	serdes_init(FSL_SRDS_2,
> +		    CONFIG_SYS_FSL_SERDES_ADDR,
> +		    FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK,
> +		    FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_SHIFT,
> +		    serdes2_prtcl_map);
> +#endif
>  }
> diff --git a/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h
> b/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h
> index 606b667..e1b3f44 100644
> --- a/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h
> +++ b/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h
> @@ -140,6 +140,7 @@ enum srds_prtcl {
> 
>  enum srds {
>  	FSL_SRDS_1  = 0,
> +	FSL_SRDS_2  = 1,
>  };
> 
>  #endif
> diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
> b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
> index cbb252c..05f497c 100644
> --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
> +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
> @@ -228,6 +228,8 @@ struct ccsr_gur {
>  #define FSL_CHASSIS2_RCWSR0_MEM_PLL_RAT_MASK	0x3f
>  #define FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK	0xffff0000
>  #define FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT	16
> +#define FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK	0x0000ffff
> +#define FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_SHIFT	0
>  #define RCW_SB_EN_REG_INDEX	7
>  #define RCW_SB_EN_MASK		0x00200000
> 
> --
> 2.1.0.27.g96db324



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