[U-Boot] [PATCH 5/5] fsl-layerscape: Add workaround for PCIe erratum A010315
Zhiqiang Hou
Zhiqiang.Hou at nxp.com
Mon Jul 4 08:28:17 CEST 2016
From: Hou Zhiqiang <Zhiqiang.Hou at nxp.com>
As the access to serders protocol unselected PCIe controller will
hang. So disable the R/W permission to unselected PCIe controller
including its CCSR, IO space and memory space according to the
serders protocol field of RCW.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou at nxp.com>
---
Tested on LS1043ARDB, LS1021AQDS boards.
arch/arm/cpu/armv7/ls102xa/soc.c | 14 ++++++++++++++
arch/arm/cpu/armv8/fsl-layerscape/soc.c | 16 ++++++++++++++++
arch/arm/include/asm/arch-fsl-layerscape/config.h | 2 ++
arch/arm/include/asm/arch-fsl-layerscape/soc.h | 4 ++++
arch/arm/include/asm/arch-ls102xa/config.h | 1 +
arch/arm/include/asm/arch-ls102xa/ls102xa_soc.h | 4 ++++
board/freescale/ls1012aqds/ls1012aqds.c | 4 ++++
board/freescale/ls1012ardb/ls1012ardb.c | 4 ++++
board/freescale/ls1021aqds/ls1021aqds.c | 4 ++++
board/freescale/ls1021atwr/ls1021atwr.c | 4 ++++
board/freescale/ls1043aqds/ls1043aqds.c | 4 ++++
board/freescale/ls1043ardb/ls1043ardb.c | 4 ++++
12 files changed, 65 insertions(+)
diff --git a/arch/arm/cpu/armv7/ls102xa/soc.c b/arch/arm/cpu/armv7/ls102xa/soc.c
index 4c93ab7..36de5ec 100644
--- a/arch/arm/cpu/armv7/ls102xa/soc.c
+++ b/arch/arm/cpu/armv7/ls102xa/soc.c
@@ -7,6 +7,7 @@
#include <common.h>
#include <asm/arch/clock.h>
#include <asm/io.h>
+#include <asm/arch/fsl_serdes.h>
#include <asm/arch/immap_ls102xa.h>
#include <asm/arch/ls102xa_soc.h>
#include <asm/arch/ls102xa_stream_id.h>
@@ -59,6 +60,19 @@ unsigned int get_soc_major_rev(void)
return major;
}
+#ifdef CONFIG_SYS_FSL_ERRATUM_A010315
+void erratum_a010315(void)
+{
+ int i;
+
+ for (i = PCIE1; i <= PCIE2; i++)
+ if (!is_serdes_configured(i)) {
+ debug("PCIe%d: disabled all R/W permission!\n", i);
+ disable_pcie_ns_access(i);
+ }
+}
+#endif
+
int arch_soc_init(void)
{
struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index fac539d..37a36f1 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -8,11 +8,14 @@
#include <fsl_ifc.h>
#include <ahci.h>
#include <scsi.h>
+#include <asm/arch/fsl_serdes.h>
#include <asm/arch/soc.h>
#include <asm/io.h>
#include <asm/global_data.h>
#include <asm/arch-fsl-layerscape/config.h>
+#ifdef CONFIG_LAYERSCAPE_NS_ACCESS
#include <fsl_csu.h>
+#endif
#ifdef CONFIG_SYS_FSL_DDR
#include <fsl_ddr_sdram.h>
#include <fsl_ddr.h>
@@ -299,6 +302,19 @@ void erratum_a008850_post(void)
#endif
}
+#ifdef CONFIG_SYS_FSL_ERRATUM_A010315
+void erratum_a010315(void)
+{
+ int i;
+
+ for (i = PCIE1; i <= PCIE4; i++)
+ if (!is_serdes_configured(i)) {
+ debug("PCIe%d: disabled all R/W permission!\n", i);
+ disable_pcie_ns_access(i);
+ }
+}
+#endif
+
void fsl_lsch2_early_init_f(void)
{
struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index 44fe0c0..4557754 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -202,6 +202,7 @@
#define CONFIG_SYS_FSL_ERRATUM_A009929
#define CONFIG_SYS_FSL_ERRATUM_A009942
#define CONFIG_SYS_FSL_ERRATUM_A009660
+#define CONFIG_SYS_FSL_ERRATUM_A010315
#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1
#elif defined(CONFIG_LS1012A)
#define CONFIG_MAX_CPUS 1
@@ -229,6 +230,7 @@
#define CONFIG_SYS_FSL_SRDS_1
#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.4"
#define CONFIG_SYS_FSL_SEC_BE
+#define CONFIG_SYS_FSL_ERRATUM_A010315
#else
#error SoC not defined
#endif
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
index 39e8c7a..40b15ba 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
@@ -98,6 +98,10 @@ void cpu_name(char *name);
void erratum_a009635(void);
#endif
+#ifdef CONFIG_SYS_FSL_ERRATUM_A010315
+void erratum_a010315(void);
+#endif
+
bool soc_has_dp_ddr(void);
bool soc_has_aiop(void);
#endif /* _ASM_ARMV8_FSL_LAYERSCAPE_SOC_H_ */
diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h
index 04abec4..2f8cfd8 100644
--- a/arch/arm/include/asm/arch-ls102xa/config.h
+++ b/arch/arm/include/asm/arch-ls102xa/config.h
@@ -132,6 +132,7 @@
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_SYS_FSL_ERRATUM_A008378
#define CONFIG_SYS_FSL_ERRATUM_A009663
+#define CONFIG_SYS_FSL_ERRATUM_A010315
#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1
#else
#error SoC not defined
diff --git a/arch/arm/include/asm/arch-ls102xa/ls102xa_soc.h b/arch/arm/include/asm/arch-ls102xa/ls102xa_soc.h
index a354684..9c91354 100644
--- a/arch/arm/include/asm/arch-ls102xa/ls102xa_soc.h
+++ b/arch/arm/include/asm/arch-ls102xa/ls102xa_soc.h
@@ -11,4 +11,8 @@ unsigned int get_soc_major_rev(void);
int arch_soc_init(void);
int ls102xa_smmu_stream_id_init(void);
+#ifdef CONFIG_SYS_FSL_ERRATUM_A010315
+void erratum_a010315(void);
+#endif
+
#endif /* __FSL_LS102XA_SOC_H */
diff --git a/board/freescale/ls1012aqds/ls1012aqds.c b/board/freescale/ls1012aqds/ls1012aqds.c
index 852d683..874c122 100644
--- a/board/freescale/ls1012aqds/ls1012aqds.c
+++ b/board/freescale/ls1012aqds/ls1012aqds.c
@@ -206,6 +206,10 @@ int board_init(void)
out_le32(&cci->ctrl_ord,
CCI400_CTRLORD_EN_BARRIER);
+#ifdef CONFIG_SYS_FSL_ERRATUM_A010315
+ erratum_a010315();
+#endif
+
#ifdef CONFIG_ENV_IS_NOWHERE
gd->env_addr = (ulong)&default_environment[0];
#endif
diff --git a/board/freescale/ls1012ardb/ls1012ardb.c b/board/freescale/ls1012ardb/ls1012ardb.c
index a3748de..6598ab3 100644
--- a/board/freescale/ls1012ardb/ls1012ardb.c
+++ b/board/freescale/ls1012ardb/ls1012ardb.c
@@ -202,6 +202,10 @@ int board_init(void)
*/
out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER);
+#ifdef CONFIG_SYS_FSL_ERRATUM_A010315
+ erratum_a010315();
+#endif
+
#ifdef CONFIG_ENV_IS_NOWHERE
gd->env_addr = (ulong)&default_environment[0];
#endif
diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c
index 291b0f4..4eb38a7 100644
--- a/board/freescale/ls1021aqds/ls1021aqds.c
+++ b/board/freescale/ls1021aqds/ls1021aqds.c
@@ -430,6 +430,10 @@ int board_init(void)
struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
unsigned int major;
+#ifdef CONFIG_SYS_FSL_ERRATUM_A010315
+ erratum_a010315();
+#endif
+
major = get_soc_major_rev();
if (major == SOC_MAJOR_VER_1_0) {
/* Set CCI-400 control override register to
diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c
index 47961f9..bc1e717 100644
--- a/board/freescale/ls1021atwr/ls1021atwr.c
+++ b/board/freescale/ls1021atwr/ls1021atwr.c
@@ -480,6 +480,10 @@ void ls1twr_program_regulator(void)
int board_init(void)
{
+#ifdef CONFIG_SYS_FSL_ERRATUM_A010315
+ erratum_a010315();
+#endif
+
#ifndef CONFIG_SYS_FSL_NO_SERDES
fsl_serdes_init();
#if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)
diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c
index fa2c647..fdae626 100644
--- a/board/freescale/ls1043aqds/ls1043aqds.c
+++ b/board/freescale/ls1043aqds/ls1043aqds.c
@@ -308,6 +308,10 @@ int misc_init_r(void)
int board_init(void)
{
+#ifdef CONFIG_SYS_FSL_ERRATUM_A010315
+ erratum_a010315();
+#endif
+
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
board_retimer_init();
diff --git a/board/freescale/ls1043ardb/ls1043ardb.c b/board/freescale/ls1043ardb/ls1043ardb.c
index 5242421..98a911c 100644
--- a/board/freescale/ls1043ardb/ls1043ardb.c
+++ b/board/freescale/ls1043ardb/ls1043ardb.c
@@ -83,6 +83,10 @@ int board_init(void)
{
struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;
+#ifdef CONFIG_SYS_FSL_ERRATUM_A010315
+ erratum_a010315();
+#endif
+
#ifdef CONFIG_FSL_IFC
init_final_memctl_regs();
#endif
--
2.1.0.27.g96db324
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