[U-Boot] [PATCH 8/8] xtensa: add support for the 'xtfpga' evaluation board

Simon Glass sjg at chromium.org
Tue Jul 12 23:57:00 CEST 2016


Hi Max,

On 8 July 2016 at 09:42, Max Filippov <jcmvbkbc at gmail.com> wrote:
> From: Chris Zankel <chris at zankel.net>
>
> The 'xtfpga' board is actually a set of FPGA evaluation boards that
> can be configured to run an Xtensa processor.
>
>  - Avnet Xilinx LX60
>  - Avnet Xilinx LX110
>  - Avnet Xilinx LX200
>  - Xilinx ML605
>  - Xilinx KC705
>
> These boards share the same components (open-ethernet, ns16550 serial,
> lcd display, flash, etc.).
>
> Signed-off-by: Chris Zankel <chris at zankel.net>
> Signed-off-by: Max Filippov <jcmvbkbc at gmail.com>
> ---
>  arch/xtensa/Kconfig                    |   3 +
>  arch/xtensa/dts/Makefile               |   2 +
>  arch/xtensa/dts/kc705.dts              |  15 ++
>  arch/xtensa/dts/kc705_nommu.dts        |  17 ++
>  arch/xtensa/dts/ml605.dts              |  15 ++
>  arch/xtensa/dts/ml605_nommu.dts        |  18 +++
>  arch/xtensa/dts/xtfpga-flash-128m.dtsi |  28 ++++
>  arch/xtensa/dts/xtfpga-flash-16m.dtsi  |  28 ++++
>  arch/xtensa/dts/xtfpga.dtsi            | 137 ++++++++++++++++
>  board/cadence/xtfpga/Kconfig           |  43 +++++
>  board/cadence/xtfpga/MAINTAINERS       |   6 +
>  board/cadence/xtfpga/Makefile          |   8 +
>  board/cadence/xtfpga/README            | 125 ++++++++++++++
>  board/cadence/xtfpga/lcd.c             |  88 ++++++++++

This should be in drivers/video and use driver model (UCLASS_VIDEO).

>  board/cadence/xtfpga/lcd.h             |  12 ++
>  board/cadence/xtfpga/xtfpga.c          | 173 ++++++++++++++++++++
>  configs/xtfpga_defconfig               |  13 ++
>  include/configs/xtfpga.h               | 286 +++++++++++++++++++++++++++++++++
>  18 files changed, 1017 insertions(+)
>  create mode 100644 arch/xtensa/dts/kc705.dts
>  create mode 100644 arch/xtensa/dts/kc705_nommu.dts
>  create mode 100644 arch/xtensa/dts/ml605.dts
>  create mode 100644 arch/xtensa/dts/ml605_nommu.dts
>  create mode 100644 arch/xtensa/dts/xtfpga-flash-128m.dtsi
>  create mode 100644 arch/xtensa/dts/xtfpga-flash-16m.dtsi
>  create mode 100644 arch/xtensa/dts/xtfpga.dtsi
>  create mode 100644 board/cadence/xtfpga/Kconfig
>  create mode 100644 board/cadence/xtfpga/MAINTAINERS
>  create mode 100644 board/cadence/xtfpga/Makefile
>  create mode 100644 board/cadence/xtfpga/README
>  create mode 100644 board/cadence/xtfpga/lcd.c
>  create mode 100644 board/cadence/xtfpga/lcd.h
>  create mode 100644 board/cadence/xtfpga/xtfpga.c
>  create mode 100644 configs/xtfpga_defconfig
>  create mode 100644 include/configs/xtfpga.h
>

[snip]
> diff --git a/board/cadence/xtfpga/xtfpga.c b/board/cadence/xtfpga/xtfpga.c
> new file mode 100644
> index 0000000..35de2f3
> --- /dev/null
> +++ b/board/cadence/xtfpga/xtfpga.c
> @@ -0,0 +1,173 @@
> +/*
> + * (C) Copyright 2007 - 2013 Tensilica Inc.
> + * (C) Copyright 2014 - 2016 Cadence Design Systems Inc.
> + *
> + * SPDX-License-Identifier:    GPL-2.0+
> + */
> +
> +#include <common.h>
> +#include <command.h>
> +#include <linux/ctype.h>
> +#include <linux/string.h>
> +#include <linux/stringify.h>
> +#include <asm/xtensa.h>
> +#include <asm/global_data.h>
> +#include <netdev.h>
> +
> +#include "lcd.h"
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +/*
> + * Check board idendity.
> + * (Print information about the board to stdout.)
> + */
> +
> +
> +#if defined(CONFIG_XTFPGA_LX60)
> +const char *board = "XT_AV60";
> +const char *description = "Avnet Xilinx LX60 FPGA Evaluation Board / ";
> +#elif defined(CONFIG_XTFPGA_LX110)
> +const char *board = "XT_AV110";
> +const char *description = "Avnet Xilinx Virtex-5 LX110 Evaluation Kit / ";
> +#elif defined(CONFIG_XTFPGA_LX200)
> +const char *board = "XT_AV200";
> +const char *description = "Avnet Xilinx Virtex-4 LX200 Evaluation Kit / ";
> +#elif defined(CONFIG_XTFPGA_ML605)
> +const char *board = "XT_ML605";
> +const char *description = "Xilinx Virtex-6 FPGA ML605 Evaluation Kit / ";
> +#elif defined(CONFIG_XTFPGA_KC705)
> +const char *board = "XT_KC705";
> +const char *description = "Xilinx Kintex-7 FPGA KC705 Evaluation Kit / ";
> +#else
> +const char *board = "<unknown>";
> +const char *description = "";
> +#endif

Shouldn't this go in the device tree? See show_board_info().

> +
> +int checkboard(void)
> +{
> +       printf("Board: %s: %sTensilica bitstream\n", board, description);
> +       return 0;
> +}
> +
> +void dram_init_banksize(void)
> +{
> +       gd->bd->bi_memstart = PHYSADDR(CONFIG_SYS_SDRAM_BASE);
> +       gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
> +}
> +
> +int board_postclk_init(void)
> +{
> +       /*
> +        * Obtain CPU clock frequency from board and cache in global
> +        * data structure (Hz). Return 0 on success (OK to continue),
> +        * else non-zero (hang).
> +        */
> +
> +#ifdef CONFIG_SYS_FPGAREG_FREQ
> +       gd->cpu_clk = (*(volatile unsigned long *)CONFIG_SYS_FPGAREG_FREQ);
> +#else
> +       /* early Tensilica bitstreams lack this reg, but most run at 50 MHz */
> +       gd->cpu_clk = 50000000UL;
> +#endif
> +       return 0;
> +}
> +
> +/*
> + * Miscellaneous early initializations.
> + * We use this hook to initialize the LCD display.
> + */
> +
> +int misc_init_f(void)
> +{
> +#ifdef CONFIG_SYS_ASCDISP
> +       /* Initialize the LCD. */
> +
> +       lcd_init();
> +#endif
> +       display_printf("U-Boot starting", NULL);

Should use driver-model.
> +
> +       return 0;
> +}
> +
> +/*
> + *  Miscellaneous late initializations.
> + *  The environment has been set up, so we can set the Ethernet address.
> + */
> +
> +int misc_init_r(void)
> +{
> +#ifdef CONFIG_CMD_NET
> +       /*
> +        * Initialize ethernet environment variables and board info.
> +        * Default MAC address comes from CONFIG_ETHADDR + DIP switches 1-6.
> +        */
> +
> +       char *s = getenv("ethaddr");
> +       if (s == 0) {
> +               unsigned int x;
> +               char s[] = __stringify(CONFIG_ETHBASE);
> +               x = (*(volatile u32 *)CONFIG_SYS_FPGAREG_DIPSW)
> +                       & FPGAREG_MAC_MASK;
> +               sprintf(&s[15], "%02x", x);
> +               setenv("ethaddr", s);
> +       }
> +#endif /* CONFIG_CMD_NET */
> +
> +       return 0;
> +}
> +
> +#ifdef CONFIG_CMD_NET
> +int board_eth_init(bd_t *bis)
> +{
> +       return ethoc_initialize(0, CONFIG_SYS_ETHOC_BASE);
> +}
> +#endif
> +
> +
> +/*
> + * Print a formatted string to the board's ASCII character display.
> + * String may have embedded newlines. Starts at top left and wraps long lines.
> + */
> +
> +#ifdef CONFIG_SYS_ASCDISP
> +void display_printf(const char *fmt, ...)
> +{
> +       va_list args;
> +
> +       /* Warning: sprintf() can overflow this buffer if too small! */
> +       char buf[CONFIG_SYS_ASCDISP_BUFSZ];
> +       int i;
> +
> +       va_start(args, fmt);
> +       vsprintf(buf, fmt, args);
> +
> +       /* Truncate to one line and pad line with blanks. */
> +       for (i = 0;
> +            i < CONFIG_SYS_ASCDISP_BUFSZ-1 && buf[i] != '\0' && buf[i] != '\n';
> +            ++i)
> +               ;
> +       for (; i < CONFIG_SYS_ASCDISP_CHARS; ++i)
> +               buf[i] = ' ';
> +       buf[CONFIG_SYS_ASCDISP_CHARS] = 0;
> +
> +       lcd_disp_at_pos(buf, 0);
> +
> +       va_end(args);
> +}
> +#endif
> +
> +#ifdef CONFIG_SHOW_BOOT_PROGRESS
> +/* Display a boot progress number on the LCD display. */
> +void show_boot_progress(int val)
> +{
> +       display_printf("Progress = %d", val);
> +}
> +#endif
> +
> +/* Implement the "reset" command. */
> +void board_reset(void)
> +{
> +       *(vu_long *)CONFIG_SYS_FPGAREG_RESET = CONFIG_SYS_FPGAREG_RESET_CODE;
> +       /* Shouldn't reach here. */
> +}

[snip]

Regards,
Simon


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