[U-Boot] [PATCH v4 2/4] ARM64: rockchip: add support for rk3399 SoC based evb

Andreas Färber afaerber at suse.de
Mon Jul 18 15:34:33 CEST 2016


Am 18.07.2016 um 10:46 schrieb Kever Yang:
> RK3399 is a SoC from Rockchip with dual-core Cortex-A72
> and quad-core Cortex-A53 CPU. It supports two USB3.0
> type-C ports and two USB2.0 EHCI ports. Other interfaces
> are very much like RK3288, the DRAM are 32bit width address
> and support address from 0 to 4GB-128MB range.
> 
> Signed-off-by: Kever Yang <kever.yang at rock-chips.com>
> ---
> 
> Changes in v4:
> remove extra blank line in evb_rk3399.h,
> remove unnecessary including file in rk3399_common.h,
> fix base on commend from Andreas,
> Rebase to U-Boot ToT.

Most of my review comments are still unresolved...

> 
> Changes in v3:
> Rebase on patch from Andreas:
> [PATCH] rockchip: Exclude rk_timer for ARM64
> [PATCH] rockchip: Clean up CPU selection
> 
> Changes in v2:
> fix description error on board Kconfig
> 
>  arch/arm/Kconfig                       |  2 -
>  arch/arm/mach-rockchip/Kconfig         | 18 +++++++++
>  arch/arm/mach-rockchip/rk3399/Kconfig  | 18 +++++++++
>  board/rockchip/evb_rk3399/Kconfig      | 15 +++++++
>  board/rockchip/evb_rk3399/MAINTAINERS  |  0
>  board/rockchip/evb_rk3399/Makefile     |  7 ++++
>  board/rockchip/evb_rk3399/evb-rk3399.c | 40 +++++++++++++++++++
>  include/configs/evb_rk3399.h           | 24 ++++++++++++
>  include/configs/rk3399_common.h        | 71 ++++++++++++++++++++++++++++++++++
>  9 files changed, 193 insertions(+), 2 deletions(-)
>  create mode 100644 arch/arm/mach-rockchip/rk3399/Kconfig
>  create mode 100644 board/rockchip/evb_rk3399/Kconfig
>  create mode 100644 board/rockchip/evb_rk3399/MAINTAINERS
>  create mode 100644 board/rockchip/evb_rk3399/Makefile
>  create mode 100644 board/rockchip/evb_rk3399/evb-rk3399.c
>  create mode 100644 include/configs/evb_rk3399.h
>  create mode 100644 include/configs/rk3399_common.h
> 
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index f9fddad..fee6a1c 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -838,8 +838,6 @@ config STM32
>  
>  config ARCH_ROCKCHIP
>  	bool "Support Rockchip SoCs"
> -	select SUPPORT_SPL
> -	select SPL
>  	select OF_CONTROL
>  	select BLK
>  	select DM

Here and below we seemed to get a merge conflict with Heiko's patch - he
added ifs instead, but still they selects got added below. I don't care
which way we do it, but it should be consistent please.

> diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
> index 12415fc..4a4b6ee 100644
> --- a/arch/arm/mach-rockchip/Kconfig
> +++ b/arch/arm/mach-rockchip/Kconfig
> @@ -9,6 +9,9 @@ config ROCKCHIP_RK3288
>  	  video interfaces supporting HDMI and eDP, several DDR3 options
>  	  and video codec support. Peripherals include Gigabit Ethernet,
>  	  USB2 host and OTG, SDIO, I2S, UART,s, SPI, I2C and PWMs.
> +	select CPU_V7

Still duplicate.

> +	select SUPPORT_SPL
> +	select SPL

Still below help.

>  
>  config ROCKCHIP_RK3036
>  	bool "Support Rockchip RK3036"
> @@ -18,7 +21,22 @@ config ROCKCHIP_RK3036
>  	  including NEON and GPU, Mali-400 graphics, several DDR3 options
>  	  and video codec support. Peripherals include Gigabit Ethernet,
>  	  USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
> +	select CPU_V7
> +	select SUPPORT_SPL
> +	select SPL

Ditto.

> +
> +config ROCKCHIP_RK3399
> +	bool "Support Rockchip RK3399"
> +	help
> +	  The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
> +	  and quad-core Cortex-A53.
> +	  including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
> +	  video interfaces supporting HDMI and eDP, several DDR3 options
> +	  and video codec support. Peripherals include Gigabit Ethernet,
> +	  USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
> +	select ARM64

Still below help.

Note that in Simon's tree this slipped below the new BROM option, it
should logically be above and after RK3288.

>  
>  source "arch/arm/mach-rockchip/rk3288/Kconfig"
>  source "arch/arm/mach-rockchip/rk3036/Kconfig"

In Simon's tree this option accidentally got dropped in this patch!

> +source "arch/arm/mach-rockchip/rk3399/Kconfig"
>  endif
> diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig b/arch/arm/mach-rockchip/rk3399/Kconfig
> new file mode 100644
> index 0000000..d15bb40
> --- /dev/null
> +++ b/arch/arm/mach-rockchip/rk3399/Kconfig
> @@ -0,0 +1,18 @@
> +if ROCKCHIP_RK3399
> +
> +config TARGET_EVB_RK3399
> +	bool "RK3399 evaluation board"
> +	help
> +	  RK3399evb is a evaluation board for Rockchp rk3399,
> +	  with full function and phisical connectors support like type-C ports,
> +	  usb2.0 host ports, LVDS, JTAG, MAC, SDcard, HDMI, USB-2-serial...

No choice - intentional or forgotten?

> +
> +config SYS_SOC
> +	default "rockchip"
> +
> +config SYS_MALLOC_F_LEN
> +	default 0x0800
> +
> +source "board/rockchip/evb_rk3399/Kconfig"
> +
> +endif
> diff --git a/board/rockchip/evb_rk3399/Kconfig b/board/rockchip/evb_rk3399/Kconfig
> new file mode 100644
> index 0000000..412b81c
> --- /dev/null
> +++ b/board/rockchip/evb_rk3399/Kconfig
> @@ -0,0 +1,15 @@
> +if TARGET_EVB_RK3399
> +
> +config SYS_BOARD
> +	default "evb_rk3399"
> +
> +config SYS_VENDOR
> +	default "rockchip"
> +
> +config SYS_CONFIG_NAME
> +	default "evb_rk3399"
> +
> +config BOARD_SPECIFIC_OPTIONS # dummy
> +	def_bool y
> +
> +endif
> diff --git a/board/rockchip/evb_rk3399/MAINTAINERS b/board/rockchip/evb_rk3399/MAINTAINERS
> new file mode 100644
> index 0000000..e69de29
> diff --git a/board/rockchip/evb_rk3399/Makefile b/board/rockchip/evb_rk3399/Makefile
> new file mode 100644
> index 0000000..aaa51c2
> --- /dev/null
> +++ b/board/rockchip/evb_rk3399/Makefile
> @@ -0,0 +1,7 @@
> +#
> +# (C) Copyright 2016 Rockchip Electronics Co., Ltd
> +#
> +# SPDX-License-Identifier:     GPL-2.0+
> +#
> +
> +obj-y	+= evb-rk3399.o
> diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c b/board/rockchip/evb_rk3399/evb-rk3399.c
> new file mode 100644
> index 0000000..cabdda1
> --- /dev/null
> +++ b/board/rockchip/evb_rk3399/evb-rk3399.c
> @@ -0,0 +1,40 @@
> +/*
> + * (C) Copyright 2016 Rockchip Electronics Co., Ltd
> + *
> + * SPDX-License-Identifier:     GPL-2.0+
> + */
> +#include <common.h>
> +#include <asm/armv8/mmu.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +static struct mm_region rk3399_mem_map[] = {
> +	{
> +		.base = 0x0UL,
> +		.size = 0x80000000UL,
> +		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
> +			 PTE_BLOCK_INNER_SHARE
> +	}, {
> +		.base = 0xf0000000UL,
> +		.size = 0x10000000UL,
> +		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
> +			 PTE_BLOCK_NON_SHARE |
> +			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
> +	}, {
> +		/* List terminator */
> +		0,
> +	}
> +};
> +
> +struct mm_region *mem_map = rk3399_mem_map;

Still in the board instead of the SoC - compare my rk3368 patch and the
in-tree, e.g., fsl implementations.

> +
> +int board_init(void)
> +{
> +	return 0;
> +}
> +
> +int dram_init(void)
> +{
> +	gd->ram_size = 0x80000000;
> +	return 0;
> +}
> diff --git a/include/configs/evb_rk3399.h b/include/configs/evb_rk3399.h
> new file mode 100644
> index 0000000..988b158
> --- /dev/null
> +++ b/include/configs/evb_rk3399.h
> @@ -0,0 +1,24 @@
> +/*
> + * (C) Copyright 2016 Rockchip Electronics Co., Ltd
> + *
> + * SPDX-License-Identifier:     GPL-2.0+
> + */
> +
> +#ifndef __EVB_RK3399_H
> +#define __EVB_RK3399_H
> +
> +#include <configs/rk3399_common.h>
> +
> +#define CONFIG_ENV_IS_IN_MMC
> +#define CONFIG_SYS_MMC_ENV_DEV 0
> +/*
> + * SPL @ 32k for ~36k
> + * ENV @ 96k
> + * u-boot @ 128K
> + */
> +#define CONFIG_ENV_OFFSET (96 * 1024)
> +
> +#define CONFIG_SYS_WHITE_ON_BLACK
> +#define CONFIG_CONSOLE_SCROLL_LINES		10
> +
> +#endif
> diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
> new file mode 100644
> index 0000000..e4248c6
> --- /dev/null
> +++ b/include/configs/rk3399_common.h
> @@ -0,0 +1,71 @@
> +/*
> + * (C) Copyright 2016 Rockchip Electronics Co., Ltd
> + *
> + * SPDX-License-Identifier:     GPL-2.0+
> + */
> +
> +#ifndef __CONFIG_RK3399_COMMON_H
> +#define __CONFIG_RK3399_COMMON_H
> +
> +#define CONFIG_SYS_CACHELINE_SIZE	64
> +
> +#define CONFIG_SYS_NO_FLASH
> +#define CONFIG_NR_DRAM_BANKS		1
> +#define CONFIG_ENV_SIZE			0x2000
> +#define CONFIG_SYS_MAXARGS		16
> +#define CONFIG_BAUDRATE			1500000
> +#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
> +#define CONFIG_SYS_CBSIZE		1024
> +#define CONFIG_SKIP_LOWLEVEL_INIT
> +#define CONFIG_DISPLAY_BOARDINFO
> +
> +#define CONFIG_SYS_NS16550_MEM32
> +
> +#define CONFIG_SYS_TEXT_BASE		0x00200000
> +#define CONFIG_SYS_INIT_SP_ADDR		0x00300000
> +#define CONFIG_SYS_LOAD_ADDR		0x00800800
> +
> +#define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */
> +
> +/* MMC/SD IP block */
> +#define CONFIG_MMC
> +#define CONFIG_GENERIC_MMC
> +#define CONFIG_SDHCI
> +#define CONFIG_BOUNCE_BUFFER
> +#define CONFIG_ROCKCHIP_SDHCI_MAX_FREQ	200000000
> +
> +#define CONFIG_FAT_WRITE
> +
> +/* RAW SD card / eMMC locations. */
> +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	256
> +#define CONFIG_SYS_SPI_U_BOOT_OFFS	(128 << 10)
> +
> +/* FAT sd card locations. */
> +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
> +#define CONFIG_SYS_SDRAM_BASE		0
> +#define CONFIG_NR_DRAM_BANKS		1
> +#define SDRAM_BANK_SIZE			(2UL << 30)
> +
> +#define CONFIG_SPI_FLASH
> +#define CONFIG_SPI
> +#define CONFIG_SF_DEFAULT_SPEED 20000000
> +
> +#ifndef CONFIG_SPL_BUILD
> +#include <config_distro_defaults.h>
> +
> +#define ENV_MEM_LAYOUT_SETTINGS \
> +	"scriptaddr=0x00000000\0" \
> +	"pxefile_addr_r=0x00100000\0" \
> +	"fdt_addr_r=0x01f00000\0" \
> +	"kernel_addr_r=0x02000000\0" \
> +	"ramdisk_addr_r=0x04000000\0"
> +
> +/* First try to boot from SD (index 0), then eMMC (index 1) */
> +#define BOOT_TARGET_DEVICES(func) \
> +	func(MMC, mmc, 0) \
> +	func(MMC, mmc, 1)
> +
> +#include <config_distro_bootcmd.h>

BOOTENV still missing.

> +#endif
> +
> +#endif

Please go through all my previous review mails (4 for this patch alone)
to see if there's more remaining issues I don't spot right now. It took
me time to do the review, so no reason to let nits slip in despite a respin.

Also it would be fair to CC me on resends after I've had comments so I
can re-review them - I did CC you on mine.

Regards,
Andreas

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HRB 21284 (AG Nürnberg)


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