[U-Boot] [PATCH 1/2] ARM: am33xx: Fix DDR init delay placement

Tom Rini trini at konsulko.com
Fri Jul 22 15:42:20 CEST 2016


On Thu, Jul 21, 2016 at 04:28:31AM -0700, Russ Dill wrote:

> The delay needs to be before the write to ref_ctrl register
> which initiates refreshes. An improper initialization sequence
> generates an L3 noc error.
> 
> Signed-off-by: Russ Dill <Russ.Dill at ti.com>

Reviewed-by: Tom Rini <trini at konsulko.com>

-- 
Tom
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