[U-Boot] [Patch v3 4/5] armv8: fsl_lsch2: Add LS1046A SoC support
york sun
york.sun at nxp.com
Tue Jul 26 22:23:10 CEST 2016
On 07/05/2016 01:13 AM, Gong Qianyu wrote:
> From: Mingkai Hu <mingkai.hu at nxp.com>
>
> The LS1046A processor is built on the QorIQ LS series architecture
> combining four ARM A72 processor cores with DPAA 1.0 support.
>
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou at nxp.com>
> Signed-off-by: Mihai Bantea <mihai.bantea at freescale.com>
> Signed-off-by: Mingkai Hu <mingkai.hu at nxp.com>
> Signed-off-by: Gong Qianyu <Qianyu.Gong at nxp.com>
> ---
> v3:
> - No change.
> v2:
> - Move serdes 2 support to a new patch.
> - Fix SVR and add LS1026A SVR.
> - Add SoC descriptions in README.soc.
> - Remove ls1046a errata.
>
> arch/arm/cpu/armv8/fsl-layerscape/Makefile | 4 +
> arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc | 42 +++++++++
> .../arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c | 25 +++++-
> arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c | 99 ++++++++++++++++++++++
> arch/arm/include/asm/arch-fsl-layerscape/config.h | 27 ++++++
> arch/arm/include/asm/arch-fsl-layerscape/cpu.h | 2 +
> .../include/asm/arch-fsl-layerscape/fsl_serdes.h | 2 +-
> arch/arm/include/asm/arch-fsl-layerscape/soc.h | 2 +
> 8 files changed, 200 insertions(+), 3 deletions(-)
>
Applied to fsl-qoriq master. Awaiting upstream.
Thanks.
York
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