[U-Boot] [PATCH 1/4] net: sun8i_emac: Fix DMA alignment issues with the rx / tx buffers

[Hans de Goede]

Hi,

On 27-07-16 19:11, Amit Tomer wrote:
> Hello,
>
>> index 7c088c3..877859c 100644
>> --- a/drivers/net/sun8i_emac.c
>> +++ b/drivers/net/sun8i_emac.c
>> @@ -32,7 +32,8 @@
>>
>>  #define CONFIG_TX_DESCR_NUM    32
>>  #define CONFIG_RX_DESCR_NUM    32
>> -#define CONFIG_ETH_BUFSIZE     2024
>> +#define CONFIG_ETH_BUFSIZE     2048
>> +#define CONFIG_ETH_RXSIZE      2024 /* Note most fit in ETH_BUFSIZE */
>
> As per the following comment made in Linux driver.
>
> /* The datasheet said that each descriptor can transfers up to 4096bytes
> + * But latter, a register documentation reduce that value to 2048
> + * Anyway using 2048 cause strange behaviours and even BSP driver use 2047
> + */
>
> Can we keep CONFIG_ETH_BUFSIZE to 2044 ?

Note that my patch is introducing a CONFIG_ETH_RXSIZE and is using that
where ever CONFIG_ETH_BUFSIZE is not used to actually allocate
or cache-flush a buffer.

And no we cannot use 2044 as then the 2nd buffer in the array
still is not cache-aligned.

But using 2048 is fine, as long as we only use it to allocate
buffers, and not actually as the value passed to the hardware
(which is what the new CONFIG_ETH_RXSIZE is for).

I started with just using 2048 and that does indeed not work,
but with the addition of CONFIG_ETH_RXSIZE things work fine.

Regards,

Hans