[U-Boot] [PATCH v2 2/2] mmc: rockchip: add clock init

[Kever Yang]

Init clock for eMMC controller.

Signed-off-by: Kever Yang <kever.yang at rock-chips.com>
---

Changes in v2:
- update base on comments from Jaehoon Chung

 drivers/mmc/rockchip_sdhci.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index 023c29b..fda3d45 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <clk.h>
 #include <dm.h>
 #include <fdtdec.h>
 #include <libfdt.h>
@@ -32,15 +33,23 @@ static int arasan_sdhci_probe(struct udevice *dev)
 	struct rockchip_sdhc_plat *plat = dev_get_platdata(dev);
 	struct rockchip_sdhc *prv = dev_get_priv(dev);
 	struct sdhci_host *host = &prv->host;
+	struct clk clk;
 	int ret;
 	u32 caps;
+	ulong max_freq = CONFIG_ROCKCHIP_SDHCI_MAX_FREQ;
 
 	host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
 	host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD;
 
+	ret = clk_get_by_index(dev, 0, &clk);
+	if (ret < 0)
+		debug("%s get clock fail\n", __func__);
+	else
+		max_freq = clk_set_rate(&clk, CONFIG_ROCKCHIP_SDHCI_MAX_FREQ);
+
 	caps = sdhci_readl(host, SDHCI_CAPABILITIES);
 	ret = sdhci_setup_cfg(&plat->cfg, dev->name, host->bus_width,
-			caps, CONFIG_ROCKCHIP_SDHCI_MAX_FREQ, EMMC_MIN_FREQ,
+			caps, max_freq, EMMC_MIN_FREQ,
 			host->version, host->quirks, 0);
 
 	host->mmc = &plat->mmc;
-- 
1.9.1