[U-Boot] [PATCH 0/4] dra7xx: QSPI: Increase SPI bus speed.

[Jagan Teki]

On 25 July 2016 at 15:45, Vignesh R <vigneshr at ti.com> wrote:
> By configuring DPLL_PER_HS13 divider value to provide 76.8MHz clock as
> QSPI fclk on dra7xx, it is possible to operate SPI slave clock at
> 768.MHz which is the maximum supported frequency as per AM572x DM
> SPRS953A. This helps to increase flash read speed by ~2MB/s.
>
> Tested  on DRA74 Rev G & H, DRA72 Rev B & C EVMs.
>
>
> Lokesh Vutla (1):
>   ARM: dra7xx: Change DPLL_PER_HS13 divider value
>
> Vignesh R (3):
>   spi: ti_qspi: dra7xx: Add support to use 76.8MHz clock
>   configs: dra7xx: Update QSPI speed to 76.8MHz
>   ARM: dts: dra7xx: Update spi-max-frequency for QSPI

Applied to u-boot-spi/master

thanks!
-- 
Jagan Teki
Free Software Engineer | www.openedev.com
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.