[U-Boot] [PATCH v2 3/3] armv8: ls1012a: Added CSU assignment for USB2

[Rajesh Bhagat]

Access settings for USB2 IP is added through CSU register.

Added CSU ID for USB2, reg: CSL23_REG[8:0]

Signed-off-by: Rajesh Bhagat <rajesh.bhagat at nxp.com>
---
Changes in v2:
 - None

 .../include/asm/arch-fsl-layerscape/ns_access.h    |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
index db76066..b7da381 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
@@ -38,6 +38,7 @@ enum csu_cslx_ind {
 	CSU_CSLX_ESDHC,
 	CSU_CSLX_IFC = 45,
 	CSU_CSLX_I2C1,
+	CSU_CSLX_USB_2,
 	CSU_CSLX_I2C3 = 48,
 	CSU_CSLX_I2C2,
 	CSU_CSLX_DUART2 = 50,
@@ -117,6 +118,7 @@ static struct csu_ns_dev ns_dev[] = {
 	 {CSU_CSLX_ESDHC, CSU_ALL_RW},
 	 {CSU_CSLX_IFC, CSU_ALL_RW},
 	 {CSU_CSLX_I2C1, CSU_ALL_RW},
+	 {CSU_CSLX_USB_2, CSU_ALL_RW},
 	 {CSU_CSLX_I2C3, CSU_ALL_RW},
 	 {CSU_CSLX_I2C2, CSU_ALL_RW},
 	 {CSU_CSLX_DUART2, CSU_ALL_RW},
-- 
1.7.7.4