[U-Boot] [PATCH v2 04/12] rockchip: rk3288: pinctrl: support more pins

Simon Glass sjg at chromium.org
Tue Mar 1 03:03:40 CET 2016


On 28 February 2016 at 14:24, Sjoerd Simons
<sjoerd.simons at collabora.co.uk> wrote:
> The rgmii_pins node in rk3288.dtsi configures 15 pins. Increase the size
> of the cell array to accomedate that, otherwise only the first 10 get
> configured.
>
> Signed-off-by: Sjoerd Simons <sjoerd.simons at collabora.co.uk>
> ---
>
> Changes in v2: None
>
>  drivers/pinctrl/rockchip/pinctrl_rk3288.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Reviewed-by: Simon Glass <sjg at chromium.org>

>
> diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3288.c b/drivers/pinctrl/rockchip/pinctrl_rk3288.c
> index 7c769bd..1fa1daa 100644
> --- a/drivers/pinctrl/rockchip/pinctrl_rk3288.c
> +++ b/drivers/pinctrl/rockchip/pinctrl_rk3288.c
> @@ -623,7 +623,7 @@ static int rk3288_pinctrl_set_state(struct udevice *dev, struct udevice *config)
>  {
>         const void *blob = gd->fdt_blob;
>         int pcfg_node, ret, flags, count, i;
> -       u32 cell[40], *ptr;
> +       u32 cell[60], *ptr;
>
>         debug("%s: %s %s\n", __func__, dev->name, config->name);
>         ret = fdtdec_get_int_array_count(blob, config->of_offset,

It's tempting to add

 if (ret == ARRAY_SIZE(cell))
   return -ENOSPC;

> --
> 2.7.0
>


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