[U-Boot] [PATCH 03/12] configs: ls2080aqds: Disable IFC NOR & QIXIS when QSPI

Yao Yuan yao.yuan at nxp.com
Thu Mar 3 04:17:05 CET 2016


On 03/03/2016 10:58AM, Prabhakar Kushwaha wrote:
> > -----Original Message-----
> > From: Yuan Yao [mailto:yao.yuan at freescale.com]
> > Sent: Wednesday, March 02, 2016 4:02 PM
> > To: york sun <york.sun at nxp.com>
> > Cc: Prabhakar Kushwaha <prabhakar.kushwaha at nxp.com>;
> > pratiyush.srivastava at freescale.com; u-boot at lists.denx.de; Yunhui Cui
> > <yunhui.cui at nxp.com>; Yao Yuan <yao.yuan at nxp.com>
> > Subject: [PATCH 03/12] configs: ls2080aqds: Disable IFC NOR & QIXIS
> > when QSPI
> >
> > From: Yuan Yao <yao.yuan at nxp.com>
> >
> > When QSPI is enabled, NOR Flash and QIXIS can’t be accessed through
> > IFC due to pin muxing.
> >
> > Enable QIXIS accessing through I2C.
> >
> > Signed-off-by: Yuan Yao <yao.yuan at nxp.com>
> > ---
> >  include/configs/ls2080aqds.h | 10 ++++++++++
> >  1 file changed, 10 insertions(+)
> >
> > diff --git a/include/configs/ls2080aqds.h
> > b/include/configs/ls2080aqds.h index dab3820..3edb0b9 100644
> > --- a/include/configs/ls2080aqds.h
> > +++ b/include/configs/ls2080aqds.h
> > @@ -17,8 +17,18 @@ unsigned long get_board_ddr_clk(void);  #endif
> >
> >  #define CONFIG_SYS_FSL_CLK
> > +
> > +#ifdef CONFIG_FSL_QSPI
> > +#define CONFIG_SYS_NO_FLASH
> > +#undef CONFIG_CMD_IMLS
> > +#define CONFIG_SYS_CLK_FREQ		100000000
> > +#define CONFIG_DDR_CLK_FREQ		133333333
> > +#define CONFIG_QIXIS_I2C_ACCESS
> 
> If we are accessing QIXIS via I2c then why hard-coding SYSCLK and DDRCLK?
> 

If we aren't hard-coding SYSCLK and DDRCLK. We don't have any other way to get the
SYSCLK and DDRCLK.
We can't get it by read FPGA before config I2C.


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